CY29973_11 Datasheet, PDF (5/10 Pages) Cypress Semiconductor – 3.3 V 125 MHz Multi-Output Zero Delay Buffer

CY29973
SYNC Output
In situations were output frequency relationships are not integer multiples of each other the SYNC output provides a signal for system
synchronization. The CY29973 monitors the relationship between the QA and the QC output clocks. It provides a low going pulse,
one period in duration, one period prior to the coincident rising edges of the QA and QC outputs. The duration and the placement of
the pulse depend on the higher of the QA and QC output frequencies. The following timing diagram illustrates various waveforms for
the SYNC output. Note that the SYNC output is defined for all possible combinations of the QA and QC outputs even though under
some relationships the lower frequency clock could be used as a synchronizing signal.
Figure 1. SYNC Output for Different Input and Out Ratio
VCO
1:1 Mode
QA
QC
SYNC
2:1 Mode
QA
QC
SYNC
QC
QA
SYNC
3:1 Mode
QA
QC
SYNC
QC
QA
SYNC
3:2 Mode
4:1 Mode
QA
QC
SYNC
4:3 Mode
6:1 Mode
QA
QC
SYNC
Document Number: 38-07291 Rev. *E
Page 5 of 10
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