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CY2305C_09 Datasheet, PDF (5/12 Pages) Cypress Semiconductor – 3.3V Zero Delay Clock Buffer
CY2305C
CY2309C
Electrical Characteristics for CY2305CSXI-XX, CY2305CSXA-XX and CY2309CSXI-XX
Electrical characteristics table for CY2305CSXI-XX, CY2305CSXA-XX and CY2309CSXI-XX Industrial / Automotive-A Temperature
Devices.
Parameter
VIL
VIH
IIL
IIH
VOL
Description
Input LOW Voltage[5]
Input HIGH Voltage[5]
Input LOW Current
Input HIGH Current
Output LOW Voltage[6]
VOH
Output HIGH Voltage[6]
IDD (PD mode) Power down Supply Current
IDD
Supply Current
Test Conditions
VIN = 0V
VIN = VDD
IOL = 8 mA (–1)
IOH =12 mA (–1H)
IOH = –8 mA (–1)
IOL = –12 mA (–1H)
REF = 0 MHz
Unloaded outputs at 66.67 MHz,
SEL inputs at VDD
Min
–0.3
2.0
–
–
–
2.4
–
–
Max
0.8
VDD + 0.3
50
100
0.4
–
25
35
Unit
V
V
μA
μA
V
V
μA
mA
Switching Characteristics for CY2305CSXC-XX and CY2309CSXC-XX
Switching characteristics table for CY2305CSXC-1 and CY2309CSXC-1 Commercial Temperature Devices. All parameters are
specified with loaded outputs.
Parameter
Name
Test Conditions
Min
Typ
Max
Unit
t1
Output Frequency
30 pF load
10 pF load
10
–
100
MHz
10
133.33 MHz
tDC
Output Duty Cycle[6] = t2 ÷ t1 Measured at 1.4V, Fout > 50 MHz
40
50
60
%
Measured at 1.4V, Fout ≤ 50 MHz
45
50
55
%
t3
Rise Time[6]
Measured between 0.8V and 2.0V
–
–
2.25
ns
t4
Fall Time[6]
Measured between 0.8V and 2.0V
–
–
2.25
ns
t5
Output to Output Skew[6] All outputs equally loaded
–
–
200
ps
t6A
Delay, REF Rising Edge to
CLKOUT Rising Edge[6]
Measured at VDD/2
–
0
±350
ps
t6B
t7
tJ
tLOCK
Delay, REF Rising Edge to
CLKOUT Rising Edge[6]
Measured at VDD/2. Measured in PLL
Bypass Mode, CY2309C device only.
1
Device to Device Skew[6] Measured at VDD/2 on the CLKOUT pins
–
of devices
Cycle to Cycle Jitter, peak[6] Measured at 66.67 MHz, loaded outputs
–
PLL Lock Time[6]
Stable power supply, valid clock
–
presented on REF pin
5
8.7
ns
0
700
ps
50
175
ps
–
1.0
ms
Switching characteristics table for CY2305CSXC-1H and CY2309CSXC-1H Commercial Temperature Devices. All parameters are
specified with loaded outputs.
Parameter
Name
Description
t1
Output Frequency
30-pF load
10-pF load
tDC
Output Duty Cycle[6] = t2 ÷ t1 Measured at 1.4V, Fout > 50 MHz
Measured at 1.4V, Fout ≤ 50 MHz
t3
Rise Time[6]
Measured between 0.8V and 2.0V
t4
Fall Time[6]
Measured between 0.8V and 2.0V
t5
Output to Output Skew[6] All outputs equally loaded
Min
Typ
Max
Unit
10
–
100
MHz
10
133.33 MHz
40
50
60
%
45
50
55
%
–
–
1.5
ns
–
–
1.5
ns
–
–
200
ps
Document Number: 38-07672 Rev. *H
Page 5 of 12
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