CY8C54_1106 Datasheet, PDF (48/105 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC) DC to 67 MHz operation

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PRELIMINARY
PSoC^® 5: CY8C54 Family Datasheet
Figure 8-4. Analog Comparator
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_^comp0
ANAIF
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comp1
_
From
Analog
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From
Analog
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c_{_}omp2
44 44
LUT0
LUT1
44 44
LUT2
LUT3
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comp3_{_}
From
Analog
Routing
UDBs
8.3.2 LUT
The CY8C54 family of devices contains four LUTs. The LUT is a
two input, one output lookup table that is driven by any one or
two of the comparators in the chip. The output of any LUT is
routed to the digital system interface of the UDB array. From the
digital system interface of the UDB array, these signals can be
connected to UDBs, DMA controller, I/O, or the interrupt
controller.
The LUT control word written to a register sets the logic function
on the output. The available LUT functions and the associated
control word is shown in Table 8-1.
Table 8-1. LUT Function vs. Program Word and Inputs
Control Word
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
Output (A and B are LUT inputs)
FALSE (‘0’)
A AND B
A AND (NOT B)
A
(NOT A) AND B
B
A XOR B
A OR B
A NOR B
A XNOR B
NOT B
A OR (NOT B)
NOT A
(NOT A) OR B
A NAND B
TRUE (‘1’)
Document Number: 001-66238 Rev. *A
Page 48 of 105
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