CY7C63723-SXC Datasheet, PDF (41/49 Pages) Cypress Semiconductor – enCoRe™ USB Combination Low-Speed USB and PS/2 Peripheral Controller

FOR
FOR
26.0 Switching Characteristics (continued)
Parameter
Description
T_SCKH
T_SCKL
T_MDO
T_MDO1
SPI Clock High Time
SPI Clock Low Time
Master Data Output Time
Master Data Output Time,
First bit with CPHA = 1
T_MSU
T_MHD
T_SSU
T_SHD
T_SDO
T_SDO1
Master Input Data Set-up time
Master Input Data Hold time
Slave Input Data Set-up Time
Slave Input Data Hold Time
Slave Data Output Time
Slave Data Output Time,
First bit with CPHA = 1
T_SSS
T_SSH
Slave Select Set-up Time
Slave Select Hold Time
Conditions
High for CPOL = 0, Low for CPOL = 1
Low for CPOL = 0, High for CPOL = 1
SCK to data valid
Time before leading SCK edge
SCK to data valid
Time after SS LOW to data valid
Before first SCK edge
After last SCK edge
T_CH
T_CYC
CLOCK
T_CL
Figure 26-1. Clock Timing
V_oh
V_crs
V_ol
D+
T_R
10%
D−
90%
T_F
90%
10%
Figure 26-2. USB Data Signal Timing
CY7C63722
CY7C63723
CY7C63743
Min.
125
125
–25
100
50
50
50
50
150
150
Max. Unit
ns
ns
50
ns
ns
ns
ns
ns
ns
100
ns
100
ns
ns
ns
Document #: 38-08022 Rev. *B
Page 41 of 49