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W42C31-03 Datasheet, PDF (4/6 Pages) Cypress Semiconductor – Spread Spectrum Frequency Timing Generator
W42C31-03
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause per-
manent damage to the device. These represent a stress rating
only. Operation of the device at these or any other conditions
above those specified in the operating sections of this specifi-
cation is not implied. Maximum conditions for extended peri-
ods may affect reliability
Parameter
VDD, VIN
TSTG
TA
TB
PD
Description
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
Ambient Temperature under Bias
Power Dissipation
Rating
Unit
–0.5 to +7.0
V
–65 to +150
°C
0 to +70
°C
–55 to +125
°C
0.5
W
DC Electrical Characteristics: 0°C < TA < 70°C, VDD = 5V ±10%
Parameter
IDD
tON
VIL
VIH
VOL
VOH
IIL
IIH
IOL
IOH
CI
CL
RP
ZOUT
Description
Supply Current
Power Up Time
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Input Low Current
Input High Current
Output Low Current
Output High Current
Input Capacitance
Load Capacitance (as seen
by XTAL)
Input Pull-Up Resistor
Clock Output Impedance
Test Condition
First locked clock cycle after
Power Good
Note 1
Note 1
@ 0.4V, VDD = 5V
@ 2.4V, VDD = 5V
All pins except X1, X2
Pins X1, X2[2]
Min
0.7VDD
2.5
Typ
Max
Unit
18
32
mA
5
ms
0.15VDD
V
V
0.4
V
V
–100
µA
10
µA
24
mA
24
mA
7
pF
17
pF
500
kΩ
20
Ω
AC Electrical Characteristics: TA = 0°C to +70°C, VDD = 5V±10%
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
fIN
fOUT
tR
tF
tOD
tID
tJCYC
Input Frequency
Output Frequency
Output Rise Time
Output Fall Time
Output Duty Cycle
Input Duty Cycle
Jitter, Cycle-to-Cycle
Harmonic Reduction
Input Clock
10
33
MHz
10
33
MHz
VDD, 15-pF load 0.8–2.4
2
5
ns
VDD, 15-pF load 2.4–0.8
2
5
ns
15-pF load
45
55
%
40
60
%
300
ps
8
dB
Notes:
1. Inputs FS1:0 have a pull-up resistor; Input OE# has a pull-down resistor.
2. Pins X1 and X2 each have a 34-pF capacitance. When used with a XTAL, the two capacitors combined load the crystal with 17 pF. If driving X1 with a
reference clock signal, the load capacitance will be 34 pF (typical).
4