CYONS2000 Datasheet, PDF (4/36 Pages) Cypress Semiconductor – OvationONS™ II Wired Laser Navigation System-on-Chip

CYONS2000
Figure 2. Block Diagram
VCSEL
Laser
Control
OptiCheckTM
Navigation
System
DSP
Resolution
Control
Ovation II
Power
System
3.3V Regulator
Boost Regulator
POWER BUS
Power Control
Battery
Filter
PSoC CORE
Port 3
Port 2
Port 1
Port 0
1.8V
PSoC
Analog
Core
Regulator ^Regulator
SYSTEM BUS
Global Analog Interconnect
SRAM
Interrupt
Controller
Supervisory ROM (SROM)
Flash
Nonvolatile Memory
CPU Core (M8C)
Sleep and
Watchdog
SYSTEM BUS
6/12/24 MHz Internal Main Oscillator (IMO)
32 kHz Internal Low Speed
Oscillator (ILO)
Multiple Clock Sources
Full
Speed
USB
Internal
Voltage
References
System
Resets
POR
and
LVD
SPI
Master/
Slave
Three 16-Bit
Programmable
Timers
SYSTEM RESOURCES
Digital
Clocks
I2C
Slave
ADC
CapSense
System
NOTE: Shaded blocks indicate optional functions - Refer to OvationONS^TM II Family Performance Table for details
Document Number: 001-44044 Rev. *G
Page 4 of 36
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