CY7C68310 Datasheet, PDF (4/34 Pages) Cypress Semiconductor – ISD-300LP™ Low-Power USB 2.0 to ATA/ATAPI Bridge IC

CY7C68310
4.2 Pin Overview (continued)
Pin
Number
63
Pin Name
nDIOR
Pin
Direction
O
64
IORDY
I
65
ATAPUEN
O
66
nDMACK
O
67
ATAIRQ
I
70, 68, 71
DA[0:2]
O
72, 73
nCS[0:1]
O
74
nPWR500
O
75
SCL
O
76
SDA_nlMODE
I/O
77
DISKRDY
I
78
VBUSPWRD
I
79 VBUSPWRVLD
I
1, 4, 10,
21, 47, 60
3, 17, 40,
59, 80
7, 24, 50,
61, 69
11
12,14,16
13
VSS
VDD25
VDD33
PVDD25
AVSS
RREF
15
AVDD25
Pin Type
3.3V drive,
5V-tolerant,
6 mA I_OL
5V-tolerant
Schmitt input
3.3V drive,
5V-tolerant,
6 mA I_OL
3.3V drive,
5V-tolerant,
6 mA I_OL
5V-tolerant
Schmitt input
3.3V drive,
5V-tolerant,
6 mA I_OL
3.3V drive,
5V-tolerant,
6 mA I_OL
high-Z driver,
5V-tolerant,
6 mA I_OL
high-Z driver,
5V-tolerant,
6 mA I_OL
high-Z driver,
5V-tolerant,
6 mA I_OL,
Schmitt input
5V-tolerant
Schmitt input
5V-tolerant
Schmitt input
5V-tolerant
Schmitt input
Power
Power
Power
Power
Power
Power
Power
ATA control signal.
Pin Description
ATA control signal.
ATA IORDY pull-up connection. For VBUS-powered systems.
ATA control signal.
ATA interrupt request.
ATA address signals.
ATA chip select signals.
Active LOW. VBUS power granted indicator.
‘0’ = VBUS power up to bMaxPower value
‘high-Z’ = bMaxPower value not granted (if more than 100 mA)
I²C-compatible clock. This pin may be left as a no-connect pin if
the I²C-compatible interface is not utilized.
I²C-compatible address/data or nIMODE select.
Configurable polarity. Device ready.
Active HIGH. Bus-powered operation select pin.
‘1’ = Bus powered
‘0’ = Self powered
Active HIGH. Indicates that VBUS power is present.
Digital ground.
2.5V digital supply.
3.3V digital supply.
Analog 2.5V supply (PLL).
Analog ground.
PLL voltage reference. Current source for 2.4k (1%) resistor
connected to AVSS.
Analog 2.5V supply.
Document 38-08030 Rev. *H
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