CY7C056V_11 Datasheet, PDF (4/26 Pages) Cypress Semiconductor – 3.3 V 16K/32K x 36 FLEx36™ Asynchronous Dual-Port Static RAM

Pin Configurations
Figure 1. 144-Pin Thin Quad Flatpack (TQFP) Top View
CY7C056V
CY7C057V
I/O33L
1
I/O34L
2
I/O35L
3
A0L
4
A1L
5
A2L
6
A3L
7
A4L
8
A5L
9
A6L
10
A7L
11
B0
12
B1
13
B2
14
B3
15
OEL
16
R/WL
17
VDD
18
VSS
19
VSS
20
CE0L
21
CE1L
22
M/S
23
SEML
24
INTL
25
BUSYL
26
A8L
27
A9L
28
A10L
29
A11L
30
A12L
31
A13L
32
NC ^[4]
33
I/O26L
34
I/O25L
35
I/O24L
36
CY7C056V (16K x 36)
CY7C057V (32K x 36)
108
I/O33R
107
I/O34R
106
I/O35R
105
A0R
104
A1R
103
A2R
102
A3R
101
A4R
100
A5R
99
A6R
98
A7R
97
BM
96
SIZE
95
WA
94
BA
93
OER
92
R/WR
91
VDD
90
VSS
89
VDD
88
CE0R
87
CE1R
86
VDD
85
SEMR
84
INTR
83
BUSYR
82
A8R
81
A9R
80
A10R
79
A11R
78
A12R
77
A13R
76
NC ^[5]
75
I/O26R
74
I/O25R
73
I/O24R
Notes
4. This pin is A14L for CY7C057V.
5. This pin is A14R for CY7C057V
Document #: 38-06055 Rev. *E
Page 4 of 26
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