CY62138EV30_12 Datasheet, PDF (4/16 Pages) Cypress Semiconductor – 2-Mbit (256 K × 8) MoBL Static RAM

CY62138EV30 MoBL^®
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage temperature ................................ –65 °C to +150 °C
Ambient temperature with
power applied ............................................ 55 °C to +125 °C
Supply voltage to ground
potential ...................................... –0.3 V to V_CC(MAX) + 0.3 V
DC voltage applied to outputs
in High Z state ^{[3, 4]} ..................... –0.3 V to V_CC(MAX) + 0.3 V
DC input voltage ^{[3, 4]} ................. –0.3 V to V_CC(MAX) + 0.3 V
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage .......................................... > 2001 V
(per MIL-STD-883, Method 3015)
Latch-up current .................................................... > 200 mA
Operating Range
Product
Range
Ambient
Temperature
V_CC^[5]
CY62138EV30LL Industrial –40 °C to +85 °C 2.2 V to 3.6 V
Electrical Characteristics
Over the Operating Range
Parameter
Description
V_OH
Output HIGH voltage
V_OL
Output LOW voltage
V_IH
Input HIGH voltage
V_IL
Input LOW voltage
I_IX
Input leakage current
I_OZ
Output leakage current
I_CC
V_CC Operating supply current
I_SB1[7]
Automatic CE power down
current – CMOS inputs
I_SB2 ^[7]
Automatic CE power down
current – CMOS inputs
Test Conditions
I_OH = –0.1 mA
V_CC = 2.20 V
I_OH = –1.0 mA
V_CC = 2.70 V
I_OL = 0.1 mA
V_CC = 2.20 V
I_OL = 2.1 mA
V_CC = 2.70 V
V_CC = 2.2 V to 2.7 V
V_CC= 2.7 V to 3.6 V
V_CC = 2.2 V to 2.7 V
V_CC= 2.7 V to 3.6 V
GND < V_I < V_CC
GND < V_O < V_CC, Output disabled
f = f_max = 1/t_RC
f = 1 MHz
V_CC = V_CCmax
I_OUT = 0 mA
CMOS levels
CE > V_CC –0.2 V, V_IN > V_CC – 0.2 V,
V_IN < 0.2 V, f = f_max (Address and
data only), f = 0 (OE, and WE), V_CC
= 3.60 V
CE > V_CC – 0.2 V,
V_IN > V_CC – 0.2 V or V_IN < 0.2 V,
f = 0, V_CC = 3.60 V
CY62138EV30-45
Min
Typ ^[6]
Max
Unit
2.0
–
–
V
2.4
–
–
V
–
–
0.4
V
–
–
0.4
V
1.8
2.2
–0.3
–
V_CC + 0.3 V
–
V_CC + 0.3 V
–
0.6
V
–0.3
–
0.8
V
–1
–
+1
A
–1
–
+1
A
–
15
20
mA
–
2
2.5
mA
–
1
7
A
–
1
7
A
Notes
3. V_IL(min.) = –2.0 V for pulse durations less than 20 ns.
4. V_IH(max) = V_CC + 0.75 V for pulse durations less than 20 ns.
5. Full device AC operation assumes a 100 s ramp time from 0 to V_CC(min.) and 200 s wait time after V_CC stabilization.
6. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V_CC = V_CC(typ.), T_A = 25 °C.
7. Chip enable (CE) must be tied to CMOS levels to meet the I_SB1 / I_SB2 / I_CCDR specification. Other inputs can be left floating.
Document Number: 38-05577 Rev. *E
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