CY7C68001_05 Datasheet, PDF (37/42 Pages) Cypress Semiconductor – EZ-USB SX2™ High-Speed USB Interface Device

CY7C68001
7,
5,
0x88,
2,
0x40,
0x00,
0x00,
//Descriptor length
//Descriptor type
//Endpoint number, and direction
//Endpoint type
//Maximum packet size (LSB)
//Max packet size (MSB)
//Polling interval
//StringDscr
//StringDscr0
4,
3,
0x09,0x04,
//String descriptor length
//String Descriptor
//US LANGID Code
//StringDscr1
16,
3,
'C',00,
'y',00,
'p',00,
'r',00,
'e',00,
's',00,
's',00,
//String descriptor length
//String Descriptor
//StringDscr2
20,
3,
'C',00,
'Y',00,
'7',00,
'C',00,
'6',00,
'8',00,
'0',00,
'0',00,
'1',00,
//String descriptor length
//String Descriptor
13.0 General PCB Layout Guidelines^[15]
The following recommendations should be followed to ensure
reliable high-performance operation.
• At least a four-layer impedance controlled boards are re-
quired to maintain signal quality.
• Specify impedance targets (ask your board vendor what
they can achieve).
• To control impedance, maintain trace widths and trace spac-
ing.
• Minimize stubs to minimize reflected signals.
• Connections between the USB connector shell and signal
ground must be done near the USB connector.
• Bypass/flyback caps on VBus, near connector, are recom-
mended.
• DPLUS and DMINUS trace lengths should be kept to within
2 mm of each other in length, with preferred length of 20–30
mm.
• Maintain a solid ground plane under the DPLUS and DMI-
NUS traces. Do not allow the plane to be split under these
traces.
• It is preferred to have no vias placed on the DPLUS or DMI-
NUS trace routing.
• Isolate the DPLUS and DMINUS traces from all other signal
traces by no less than 10 mm.
14.0 Quad Flat Package No Leads (QFN)
Package Design Notes
Electrical contact of the part to the Printed Circuit Board (PCB)
is made by soldering the leads on the bottom surface of the
package to the PCB. Hence, special attention is required to the
heat transfer area below the package to provide a good
thermal bond to the circuit board. A Copper (Cu) fill is to be
designed into the PCB as a thermal pad under the package.
Heat is transferred from the SX2 through the device’s metal
paddle on the bottom side of the package. Heat from here, is
conducted to the PCB at the thermal pad. It is then conducted
Document #: 38-08013 Rev. *H
Page 37 of 42