CY37032 Datasheet, PDF (30/62 Pages) Cypress Semiconductor – 5V, 3.3V, ISR™ High-Performance CPLDs

Typical 3.3V Power Consumption (continued)
CY37192V
120
100
Ultra37000 CPLD Family
H igh S pe e d
80
Low Power
60
40
20
CY37256V
0
0
20
40
60
80
100
120
Frequency (M H z)
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
V_CC = 3.3V, T_A = Room Temperature
140
120
100
80
60
40
20
0
0
Low Power
H ig h S p e e d
20
40
60
80
100
120
Frequency (M H z)
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
V_CC = 3.3V, T_A = Room Temperature
Document #: 38-03007 Rev. *C
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