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CY5057_11 Datasheet, PDF (3/11 Pages) Cypress Semiconductor – High-Frequency Flash Programmable PLL Die with Spread Spectrum
CY5057
Functional Description
CY5057 is a Flash programmable, high accuracy, PLL-based die
designed for the crystal oscillator market. It also contains spread
spectrum circuitry that is enabled or disabled with an external
pin. The die is integrated with a low cost 25.1 MHz fundamental
tuned crystal in a 4 or 6-pin through hole or surface mount
package. The oscillator devices may be stocked as blank parts
and custom frequencies programmed in-package at the last
stage before shipping. This enables faster manufacturing of
custom and standard crystal oscillators without the need for
dedicated and expensive crystals.
CY5057 contains an on-chip oscillator and unique oscillator
tuning circuit for fine tuning the output frequency. The crystal
Cload is selectively adjusted by programming a set of Flash
memory bits. This feature is used to compensate for crystal
variations or to obtain a more accurate synthesized frequency.
CY5057 uses a simple two-pin programming interface, excluding
the VSS and VDD pins.. Clock outputs are generated from 5 MHz
to 170 MHz at 3.3 V ± 10% operating voltage. You can reprogram
the entire Flash configuration multiple times to alter or reuse the
programmed inventory.
CY5057 PLL die is designed for very high resolution. It has a
10-bit feedback counter multiplier and a 7-bit reference counter
divider. This enables the synthesis of highly accurate and stable
output clock frequencies with zero or low PPM error. The output
of the PLL or the oscillator is further modified by a 7-bit linear
post divider with a total of 126 divider options (2 to 127).
CY5057 also contains flexible power management controls.
These parts include both power down mode (PD# = 0) and
output enable mode (OE = 1). The power down and output
enable modes have an additional setting to determine timing
(asynchronous or synchronous) with respect to the output signal.
Controlled rise and fall times, unique output driver circuits, and
innovative circuit layout techniques enables CY5057 to have low
jitter and accurate outputs. This makes it suitable for most PC,
networking, and consumer applications.
CY5057 also has an additional spread spectrum feature that is
disabled or enabled with an external pin. For more information,
refer the section Spread Spectrum.
Flash Configuration and Spread Spectrum
Storage Block
Table 2 summarizes the features configurable by the Flash
memory bits. Refer to “CY5057 Programming Specification” for
programming details. The specification can be obtained from
your Cypress factory representative.
Table 2. Flash Programmable Features
Adjust Feedback counter value (P)
Frequency Reference counter value (Q)
Output divider selection
Oscillator tuning (load capacitance values)
Oscillator direct output
Power management mode (OE or PD#)
Power management timing (synchronous or asynchronous)
Spread spectrum
Pull up and Pull down resistors
PLL Output Frequency
CY5057 contains a high resolution PLL with a 10-bit multiplier
and a 7-bit divider. The output frequency of the PLL is
determined by the following equation:
FPLL
=
-2----•----(---P---B----L----+-----4---)----+-----P----o-
(QL + 2)
•
FREF
Equation (1)
In this equation:
■ QL is the loaded or programmed reference counter value
(Q counter)
■ PBL is the loaded or programmed feedback counter value
(P counter)
■ Po is the P offset bit (is only 0 or 1)
In spread spectrum mode, the time averaged P value is used to
calculate the average frequency.
Power Management Features
CY5057 contains Flash programmable PD# (active LOW) and
OE (active HIGH) functions. If power down mode is selected
(PD# = 0), the oscillator and PLL are placed in a low supply
current standby mode and the output is tri-stated and weakly
pulled low. The oscillator and PLL circuits must relock when the
part leaves power down mode. If output enable mode is selected
(OE = 0), the output is tri-stated and weakly pulled low. In this
mode, the oscillator and PLL circuits continue to operate allowing
a rapid return to normal operation when the output is enabled.
In addition, the PD# and OE modes may be programmed to
occur synchronously or asynchronously with respect to the
output signal. When the asynchronous setting is used, the power
down or output disable occurs immediately (allowing for logic
delays) irrespective of the position in the clock cycle. However,
when the synchronous setting is used, the part waits for a falling
edge at the output before power down or output enable signal is
initiated. This prevents output glitches. In asynchronous or
synchronous setting, the output is always enabled
synchronously by waiting for the next falling edge of the output.
Spread Spectrum
CY5057 contains spread spectrum with Flash programmable
spread percentage and modulation frequency. Center spread
nonlinear “hershey kiss” modulation is obtained. Spread
percentage is programmed to values between ±0.25% and
±2.00%, in 0.25% intervals. Only one spread profile (for one
specific percentage spread and for one output frequency) may
be programmed into the device at a time.
CY5057 has a spread spectrum on and off function. The spread
spectrum is enabled or disabled through an external pin. Timing
this feature is explained in the section Switching Waveforms on
page 7.
Document #: 38-07363 Rev. *I
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