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CY26200_05 Datasheet, PDF (3/5 Pages) Cypress Semiconductor – T1/E1 Clock Generator
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CY26200
AC Electrical Characteristics (VDD = 3.3V, Commercial)
Parameter[3]
Description
Conditions
Min. Typ.
DC
Output Duty Cycle
Duty Cycle is defined in Figure 1, 50% of VDD
45
50
t3
Rising Edge Slew Rate Output Clock Rise Time, 20% - 80% of VDD
0.8
1.4
t4
Falling Edge Slew Rate Output Clock Fall Time, 80% - 20% of VDD
0.8
1.4
t9
Clock Jitter
Peak to Peak period jitter
200
t10
PLL Lock Time
AC Electrical Characteristics (VDD = 3.3V, Industrial)
Parameter[3]
Name
Description
Min. Typ.
DC
Output Duty Cycle
Duty Cycle is defined in Figure 1, 50% of VDD
45
50
t3
Rising Edge Slew Rate Output Clock Rise Time, 20% - 80% of VDD
0.8
1.4
t4
Falling Edge Slew Rate Output Clock Fall Time, 80% - 20% of VDD
0.8
1.4
t9
Clock Jitter
Peak to Peak period jitter
200
t10
PLL Lock Time
Test Circuit
V DD
0.1 mF
OUTPUTS
CLK out
C LOAD
Max.
55
3
Max.
55
3
Unit
%
V/ns
V/ns
ps
ms
Unit
%
V/ns
V/ns
ps
ms
CLK
t1
t2
50%
50%
GND
Figure 1. Duty Cycle Definition; DC = t2/t1
Ordering Information
Ordering Code
CY26200SC
CY26200SCT
CY26200SI
CY26200SIT
Lead-free
CY26200SXC
CY26200SXCT
CY26200SXI
CY26200SXIT
Package Type
8-lead SOIC
8-lead SOIC - Tape and Reel
8-lead SOIC
8-lead SOIC - Tape and Reel
8-lead SOIC
8-lead SOIC - Tape and Reel
8-lead SOIC
8-lead SOIC - Tape and Reel
Notes:
3. Not 100% tested
Document #: 38-07335 Rev. *B
CLK
t3
t4
80%
20%
Figure 2. Rise and Fall Time Definitions
Operating Range
Commercial
Commercial
Industrial
Industrial
Commercial
Commercial
Industrial
Industrial
Operating Voltage
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
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