CY2303_13 Datasheet, PDF (3/14 Pages) Cypress Semiconductor – Phase-Aligned Clock Multiplier

Pin Configurations
Figure 1. 8-pin SOIC pinout
REF ¹
GND ²
REFIN ³
N/C 4
8 OE
7 V_DD
6 REFx4
5 REFx2
Pin Description
Pin
Signal ^[1]
1
REF
2
GND
3
REFIN
4
N/C
5
REFx2
6
REFx4
7
V_DD
8
OE
REF output (1x reference input)
Ground
Input reference frequency, 5 V tolerant input
No connect
2x reference input
4x reference input
3.3 V supply
Output enable (weak pull-up)
Description
CY2303
Note
1. Weak pull-down on all outputs.
Document Number: 38-07249 Rev. *F
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