CYUSB3035 Datasheet, PDF (29/50 Pages) Cypress Semiconductor – EZ-USB® FX3S SuperSpeed USB Controller

CYUSB3035
Table 11. Asynchronous ADMux Timing Parameters^[6]
Parameter
tRC
tACC
tCO
tAVOE
tOLZ
tOE
tHZ
tWC
tAW
tCW
tAVWE
tWP
tWPH
tDS
tDH
tAVS
tAVH
tVP
tCPH
tVPH
tCEAV
Description
Min Max Units
Notes
ADMux Asynchronous READ Access Timing Parameters
Read cycle time (address valid to address
54.5
–
valid)
ns This parameter is dependent on when
the P-port processors deasserts OE#
Address valid to data valid
–
32
ns
CE# assert to data valid
–
34.5 ns
ADV# deassert to OE# assert
2
–
ns
OE# assert to data LOW-Z
0
–
ns
OE# assert to data valid
–
25
ns
Read cycle end to data HIGH-Z
–
22.5 ns
ADMux Asynchronous WRITE Access Timing Parameters
Write cycle time (Address Valid to Address
Valid)
–
52.5 ns
Address valid to write end
30
–
ns
CE# assert to write end
30
–
ns
ADV# deassert to WE# assert
2
–
ns
WE# LOW pulse width
20
–
ns
WE# HIGH pulse width
10
–
ns
Data valid setup to WE# deassert
18
–
ns
Data valid hold from WE# deassert
2
–
ns
ADMux Asynchronous Common READ/WRITE Access Timing Parameters
Address valid setup to ADV# deassert
5
–
ns
Address valid hold from ADV# deassert
2
–
ns
ADV# LOW pulse width
7.5
–
ns
CE# HIGH pulse width
10
–
ns
ADV# HIGH pulse width
15
–
ns
CE# assert to ADV# assert
0
–
ns
Note
6. All parameters guaranteed by design and validated through characterization.
Document Number: 001-84160 Rev. *B
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