CY14C064I Datasheet, PDF (29/41 Pages) Cypress Semiconductor – 64-Kbit (8 K x 8) Serial (I2C) nvSRAM with Real Time Clock

PRELIMINARY
CY14C064I
CY14B064I, CY14E064I
Best Practices
nvSRAM products have been used effectively for over 26 years.
While ease-of-use is one of the product’s main system values,
experience gained working with hundreds of applications has
resulted in the following suggestions as best practices:
■ The nonvolatile cells in this nvSRAM product are delivered by
Cypress with 0x00 written in all cells. Incoming inspection
routines at customer or contract manufacturer’s sites
sometimes reprogram these values. Final NV patterns are
typically repeating patterns of AA, 55, 00, FF, A5, or 5A. End
product’s firmware should not assume an NV array is in a set
programmed state. Routines that check memory content
values to determine first time system configuration, cold or
warm boot status, and so on should always program a unique
NV pattern (that is, complex 4-byte pattern of 46 E6 49 53 hex
or more random bytes) as part of the final system
manufacturing test to ensure these system routines work
consistently.
■ Power up boot firmware routines should rewrite the nvSRAM
into the desired state (for example, AutoStore enabled). While
the nvSRAM is shipped in a preset state, best practice is to
again rewrite the nvSRAM into the desired state as a safeguard
against events that might flip the bit inadvertently such as
program bugs and incoming inspection routines.
■ The V_CAP value specified in this datasheet includes a minimum
and a maximum value size. Best practice is to meet this
requirement and not exceed the maximum V_CAP value because
the nvSRAM internal algorithm calculates V_CAP charge and
discharge time based on this max V_CAP value. Customers that
want to use a larger V_CAP value to make sure there is extra store
charge and store time should discuss their V_CAP size selection.
■ When base time is updated, these updates are transferred to
the time keeping registers when ‘W’ bit is set to ‘0’. This transfer
takes t_RTCp time to complete. It is recommended to initiate
software STORE or Hardware STORE after t_RTCp time to save
the base time into nonvolatile memory.
Document #: 001-68169 Rev. **
Page 29 of 41
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