CY8C24533-24PVXI Datasheet, PDF (27/34 Pages) Cypress Semiconductor – PSoC® Programmable System-on-Chip™

CY8C24533
When bypassed by a capacitor on P2[4], the noise of the analog ground signal distributed to each block is reduced by a factor of up
to 5 (14 dB). This is at frequencies above the corner frequency defined by the on-chip 8.1k resistance and the external capacitor.
Figure 14. Typical AGND Noise with P2[4] Bypass
dBV/rtHz
10000
0
0.01
0.1
1.0
10
1000
100
0.001
0.01
0.1 Freq (kHz) 1
10
100
At low frequencies, the opamp noise is proportional to 1/f, power independent, and determined by device geometry. At high
frequencies, increased power level reduces the noise spectrum level.
Figure 15. Typical Opamp Noise
nV/rtHz
10000
1000
PH_BH
PH_BL
PM_BL
PL_BL
100
10
0.001
0.01
0.1 _{Freq (kHz)}
1
10
100
Document Number: 001-14643 Rev. *D
Page 27 of 34
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