CY7C2268XV18 Datasheet, PDF (27/29 Pages) Cypress Semiconductor – 36-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT

Acronyms
Acronym
Description
DDR
double data rate
EIA
electronic industries alliance
FBGA
fine-pitch ball grid array
HSTL
high-speed transceiver logic
I/O
input/output
JEDEC joint electron devices engineering council
JTAG
joint test action group
LMBU
logical multi-bit upsets
LSB
least significant bit
LSBU
logical single-bit upsets
MSB
most significant bit
ODT
on-die termination
PLL
phase-locked loop
QDR
quad data rate
SEL
single event latch-up
SRAM
static random access memory
TAP
test access port
TCK
test clock
TDI
test data-in
TDO
test data-out
TMS
test mode select
CY7C2268XV18, CY7C2270XV18
Document Conventions
Units of Measure
Symbol
°C
k
MHz
µA
µs
mV
mA
ms
mm
ns

%
pF
ps
V
W
Unit of Measure
degree Celsius
kilohm
megahertz
microampere
microsecond
millivolt
milliampere
millisecond
millimeter
nanosecond
ohm
percent
picofarad
picosecond
volt
watt
Document Number: 001-70332 Rev. *B
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