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CY7C1623KV18 Datasheet, PDF (26/28 Pages) Cypress Semiconductor – 144-Mbit DDR-II SIO SRAM Two-Word Burst Architecture
CY7C1623KV18
Document History Page
Document Title: CY7C1623KV18, 144-Mbit DDR-II SIO SRAM Two-Word Burst Architecture
Document Number: 001-44276
Rev.
ECN No.
Submission
Date
Orig. of
Change
Description of Change
**
1961327 See ECN
VKN / New data sheet.
PYRS
*A
2555945 08/22/08
VKN / Updated Identification Register Definitions (Changed Revision Number (31:29)
PYRS from 001 to 000).
Updated Power Up Sequence in DDR-II SRAM (Updated description and
Figure 4).
Updated Maximum Ratings (Changed Ambient Temperature with Power
Applied from “–10 °C to +85 °C” to “–55 °C to +125 °C”).
Updated Electrical Characteristics (Changed the maximum values of IDD and
ISB1 parameters).
Updated Thermal Resistance (Included values for 165-ball FBGA package).
*B
3228953 04/15/2011
NJY Changed status from Preliminary to Final.
Updated Ordering Information (updated part numbers) and added Ordering
Code Definitions.
Updated Package Diagram.
Added Acronyms and Units of Measure.
Updated in new template.
*C
3243572 04/28/2011
NJY Minor text edits across the document.
*D
3275033 06/06/2011
NJY No technical updates.
*E
3428174 11/04/2011
NJY Updated Package Diagram.
Document Number: 001-44276 Rev. *G
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