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CY7C1511KV18_11 Datasheet, PDF (26/33 Pages) Cypress Semiconductor – 72-Mbit QDR II SRAM 4-Word Burst Architecture
CY7C1511KV18, CY7C1526KV18
CY7C1513KV18, CY7C1515KV18
Switching Characteristics (continued)
Over the Operating Range[28, 29]
Cypress Consortium
Parameter Parameter
Description
333 MHz 300 MHz 250 MHz 200 MHz 167 MHz
Unit
Min Max Min Max Min Max Min Max Min Max
Output Times
tCO
tCHQV
tDOH
tCHQX
tCCQO
tCQOH
tCQD
tCQDOH
tCQH
tCQHCQH
tCHCQV
tCHCQX
tCQHQV
tCQHQX
tCQHCQL
tCQHCQH
tCHZ
tCHQZ
tCLZ
tCHQX1
PLL Timing
C/C clock rise (or K/K in single clock – 0.45 – 0.45 – 0.45 – 0.45 – 0.50 ns
mode) to data valid
Data output hold after output C/C –0.45 – –0.45 – –0.45 – –0.45 – -0.50 – ns
clock rise (Active to Active)
C/C clock rise to echo clock valid – 0.45 – 0.45 – 0.45 – 0.45 – 0.50 ns
Echo clock hold after C/C clock rise –0.45 – –0.45 – –0.45 – –0.45 – -0.50 – ns
Echo clock high to data valid
0.25
0.27
0.30
0.35
0.40 ns
Echo clock high to data invalid –0.25 – –0.27 – –0.30 – –0.35 – -0.40 – ns
Output clock (CQ/CQ) HIGH[31] 1.25 – 1.4 – 1.75 – 2.25 – 2.75 – ns
CQ clock rise to CQ clock rise (rising 1.25 – 1.4 – 1.75 – 2.25 – 2.75 – ns
edge to rising edge)[31]
Clock (C/C) Rise to High-Z
(Active to High-Z)[32, 33]
Clock (C/C) rise to Low-Z [32, 33]
– 0.45 – 0.45 – 0.45 – 0.45 – 0.50 ns
–0.45 – –0.45 – –0.45 – -0.45 – –0.50 – ns
tKC Var
tKC lock
tKC Reset
tKC Var
tKC lock
tKC Reset
Clock phase jitter
PLL lock time (K, C)
K static to PLL reset
– 0.20 – 0.20 – 0.20 – 0.20 – 0.20 ns
20 – 20 – 20 – 20 – 20 – μs
30
30
30
30
30
ns
Notes
31. These parameters are extrapolated from the input timing parameters (tCYC/2 - 250 ps, where 250 ps is the internal jitter). These parameters are only guaranteed
by design and are not tested in production.
32. tCHZ, tCLZ, are specified with a load capacitance of 5 pF as in (b) of AC Test Loads and Waveforms. Transition is measured ± 100 mV from steady-state voltage.
33. At any voltage and temperature tCHZ is less than tCLZ and tCHZ less than tCO.
Document Number: 001-00435 Rev. *N
Page 26 of 33
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