CY8C23533_08 Datasheet, PDF (25/37 Pages) Cypress Semiconductor – PSoC Programmable System-on-Chip

CY8C23433, CY8C23533
AC Electrical Characteristics
AC Chip-Level Specifications
The following table lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ T_A ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ T_A ≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
Table 24. 5V and 3.3V AC Chip-Level Specifications
Symbol
F_IMO24
Description
Internal Main Oscillator Frequency for 24
MHz
F_IMO6
Internal Main Oscillator Frequency for 6 MHz
F_CPU1
F_CPU2
F_48M
CPU Frequency (5V Nominal)
CPU Frequency (3.3V Nominal)
Digital PSoC Block Frequency
F_24M
F_32K1
F_32K2
Digital PSoC Block Frequency
Internal Low Speed Oscillator Frequency
External Crystal Oscillator
F_PLL
PLL Frequency
Jitter24M2 24 MHz Period Jitter (PLL)
T_PLLSLEW
PLL Lock Time
T_PLLSLEWSLOW PLL Lock Time for Low Gain Setting
T_OS
External Crystal Oscillator Startup to 1%
T_OSACC
External Crystal Oscillator Startup to 100 ppm
Jitter32k
T_XRST
DC24M
Step24M
Fout48M
32 kHz Period Jitter
External Reset Pulse Width
24 MHz Duty Cycle
24 MHz Trim Step Size
48 MHz Output Frequency
Jitter24M1R
F_MAX
T_RAMP
24 MHz Period Jitter (IMO) Root Mean
Squared
Maximum frequency of signal on row input or
row output.
Supply Ramp Time
Min
23.4
5.75
0.093
0.093
0
0
15
–
–
–
0.5
0.5
–
–
–
10
40
–
46.8
–
–
0
Typ
Max
Units
Notes
24 _24.6^{[13],[14],[15]} MHz Trimmed for 5V or 3.3V
operation using factory trim
values. See Figure 8 on page 14.
SLIMO mode = 0.
6 _6.35^{[13],[14],[15]} MHz Trimmed for 5V or 3.3V
operation using factory trim
values. See Figure 8 on page 14.
SLIMO mode = 1.
24
24.6^{[13],[14] MHz}
12
12.3^{[13],[14] MHz}
48 _49.2^{[13],[14],[16]} MHz Refer to the AC Digital Block
Specifications.
24
24.6^{[14],[16] MHz}
32
75
kHz
32.768
–
kHz Accuracy is capacitor and crystal
dependent. 50% duty cycle.
23.986
–
MHz Is a multiple (x732) of crystal
frequency.
–
600
ps
–
10
ms
–
50
ms
1700
2620
ms
2800
3800
ms The crystal oscillator frequency
is within 100 ppm of its final value
by the end of the T_osacc period.
Correct operation assumes a
properly loaded 1 uW maximum
drive level 32.768 kHz crystal.
3.0V ≤ Vdd ≤ 5.5V, -40 °C ≤ T_A ≤
85°C.
100
ns
–
–
μs
50
60
%
50
–
kHz
48.0
49.2^{[13],[15] MHz Trimmed. Using factory trim}
values.
–
600
ps
–
12.3
MHz
–
–
μs
Notes
13. 4.75V < Vdd < 5.25V.
14. Accuracy derived from Internal Main Oscillator with appropriate trim for Vdd range.
15. 3.0V < Vdd < 3.6V. See Application Note AN2012 “Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” for information on trimming for operation
at 3.3V.
16. See the individual user module data sheets for information on maximum frequencies for user modules.
Document Number: 001-44369 Rev. *B
Page 25 of 37
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