CY7C1371C Datasheet, PDF (24/33 Pages) Cypress Semiconductor – 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture

CY7C1371C
CY7C1373C
Thermal Resistance^[14]
Parameter
Θ_JA
Θ_JC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Capacitance^[14]
Test Conditions
Test conditions follow standard
test methods and procedures
for measuring thermal
impedance, per EIA / JESD51.
Parameter
C_IN
C_CLK
C_I/O
Description
Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
AC Test Loads and Waveforms
Test Conditions
T_A = 25°C, f = 1 MHz,
V_DD = 3.3V.
V_DDQ = 2.5V
TQFP
Package
31
6
TQFP
Package
5
5
5
BGA
Package
45
fBGA
Package
46
7
3
BGA
Package
8
8
8
fBGA
Package
9
9
9
Unit
°C/W
°C/W
Unit
pF
pF
pF
3.3V I/O Test Load
OUTPUT
Z₀ = 50Ω
3.3V
OUTPUT
R_L = 50Ω
5 pF
V_L = 1.5V
(a)
2.5V I/O Test Load
INCLUDING
JIG AND
SCOPE
R = 317Ω
R = 351Ω
(b)
V_DD
GND
ALL INPUT PULSES
10%
90%
≤ 1ns
90%
10%
≤ 1ns
(c)
OUTPUT
Z₀ = 50Ω
2.5V
OUTPUT
R_L = 50Ω
5 pF
V_L = 1.25V
(a)
INCLUDING
JIG AND
SCOPE
R = 1667Ω
R =1538Ω
V_DD
GND
ALL INPUT PULSES
10%
90%
≤ 1ns
90%
10%
≤ 1ns
(b)
(c)
Note:
14. Tested initially and after any design or process change that may affect these parameters.
Document #: 38-05234 Rev. *D
Page 24 of 33