CY7C60445_08 Datasheet, PDF (23/27 Pages) Cypress Semiconductor – enCoRe™ V Low Voltage Microcontroller

PRELIMINARY
CY7C60445, CY7C6045x
AC SPI Specifications
Table 17 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.
Table 17. AC SPI Specifications
Symbol
Description
Min
Typ
Max
F_SPIM
Maximum Input Clock Frequency Selection, Master⁽²¹⁾
–
–
8.2
F_SPIS
Maximum Input Clock Frequency Selection, Slave
–
–
4.1
T_SS
Width of SS_ Negated Between Transmissions
50
–
–
Units
MHz
MHz
ns
AC I²C Specifications
Table 18 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.
Table 18. AC Characteristics of the I²C SDA and SCL Pins
Symbol
Description
F_SCLI2C
T_HDSTAI2C
T_LOWI2C
T_HIGHI2C
T_SUSTAI2C
T_HDDATI2C
T_SUDATI2C
T_SUSTOI2C
T_BUFI2C
T_SPI2C
SCL Clock Frequency
Hold Time (repeated) START Condition. After this
period, the first clock pulse is generated.
LOW Period of the SCL Clock
HIGH Period of the SCL Clock
Set-up Time for a Repeated START Condition
Data Hold Time
Data Set-up Time
Set-up Time for STOP Condition
Bus Free Time Between a STOP and START Condition
Pulse Width of spikes are suppressed by the input filter
Standard Mode
Min
Max
0
100
4.0
–
4.7
–
4.0
–
4.7
–
0
–
250
–
4.0
–
4.7
–
–
–
Fast Mode
Min
Max
0
400
0.6
–
1.3
–
0.6
–
0.6
–
0
–
100⁽²²⁾
–
0.6
–
1.3
–
0
50
Units
kHz
μs
μs
μs
μs
μs
ns
μs
μs
ns
Figure 8. Definition for Timing for Fast/Standard Mode on the I²C Bus
SDA
T_LOWI2C
T_SUDATI2C
T_HDSTAI2C
T_SPI2C
T_BUFI2C
SCL
S ^T_HDSTAI2C ^THDDATI2C ^T_HIGHI2C
T_SUSTAI2C
Sr
T_SUSTOI2C
P
S
Notes
21. Output clock frequency is half of input clock rate.
22. A fast mode I2C bus device can be used in a standard mode I2C bus system, but the requirement t_SU;DAT Å  250 ns must then be met. This is automatically the case
if the device does not stretch the LOW period of the SCL signal. If such device does stretch the LOW period of the SCL signal, it must output the next data bit to the
SDA line t_rmax + t_SU;DAT = 1000 + 250 = 1250 ns (according to the standard mode I2C bus specification) before the SCL line is released.
Document Number: 001-12395 Rev. *F
Page 23 of 27
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