CY14MC256J_12 Datasheet, PDF (23/30 Pages) Cypress Semiconductor – 256-Kbit (32 K × 8) Serial (I2C) nvSRAM

CY14MC256J
CY14MB256J
CY14ME256J
Software Controlled STORE/RECALL Cycles
Over the Operating Range
Parameter
Description
t_RECALL
t_SS[18, ^19]
RECALL duration
Software sequence processing time
Switching Waveforms
Figure 33. Software STORE/RECALL Cycle ^[19]
CY14MX256J
Unit
Min
Max
–
600
µs
–
500
µs
DATA OUTPUT
BY MASTER
nvSRAM Control Slave Address
Command Reg Address
Command Byte (STORE/RECALL)
acknowledge (A) by Slave
acknowledge (A) by Slave
acknowledge (A) by Slave
SCL FROM
MASTER
S
1
2
START
condition
RWI
8
9
1
2
8
9
1
2
8
9
P
t _{STORE /t RECALL}
Figure 34. AutoStore Enable/Disable Cycle
DATA OUTPUT
BY MASTER
nvSRAM Control Slave Address
Command Reg Address
Command Byte (ASENB/ASDISB)
acknowledge (A) by Slave
acknowledge (A) by Slave
acknowledge (A) by Slave
SCL FROM
MASTER
S
1
2
START
condition
RWI
8
9
1
2
8
9
1
2
8
9
P
t _SS
Notes
18. This is the amount of time it takes to take action on a soft sequence command. V_CC power must remain HIGH to effectively register command.
19. Commands such as STORE and RECALL lock out I/O until operation is complete which further increases this time. See the specific command.
Document Number: 001-65233 Rev. *D
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