CY8C21534 Datasheet, PDF (22/35 Pages) Cypress Semiconductor – PSoC Mixed-Signal Array

CY8C21x34 Final Data Sheet
3. Electrical Specifications
3.4 AC Electrical Characteristics
3.4.1 AC Chip-Level Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ TA ≤ 85°C, 3.0V to 3.6V and -40°C ≤ TA ≤ 85°C, or 2.4V to 3.0V and -40°C ≤ TA ≤ 85°C, respectively. Typical parameters
apply to 5V, 3.3V, or 2.7V at 25°C and are for design guidance only.
Table 3-14. 5V and 3.3V AC Chip-Level Specifications
Symbol
FIMO24
FIMO6
FCPU1
FCPU2
FBLK5
FBLK33
F32K1
Jitter32k
Jitter32k
TXRST
DC24M
Step24M
Fout48M
Jitter24M1
FMAX
TRAMP
Description
Internal Main Oscillator Frequency for 24 MHz
Internal Main Oscillator Frequency for 6 MHz
CPU Frequency (5V Nominal)
CPU Frequency (3.3V Nominal)
Digital PSoC Block Frequency⁰(5V Nominal)
Digital PSoC Block Frequency (3.3V Nominal)
Internal Low Speed Oscillator Frequency
32 kHz RMS Period Jitter
32 kHz Peak-to-Peak Period Jitter
External Reset Pulse Width
24 MHz Duty Cycle
24 MHz Trim Step Size
48 MHz Output Frequency
24 MHz Peak-to-Peak Period Jitter (IMO)
Maximum frequency of signal on row input or row output.
Supply Ramp Time
Min
23.4
5.75
0.93
0.93
0
0
15
–
–
10
40
–
46.8
–
–
0
Typ
24
6
24
12
48
24
32
100
1400
–
50
50
48.0
600
–
–
Max
Units
24.6^a,b,c MHz
6.35^a,b,c MHz
24.6^a,b
12.3^b,c
49.2^a,b,d
MHz
MHz
MHz
24.6^b,d
64
200
–
–
60
–
49.2^a,c
12.3
–
MHz
kHz
ns
µs
%
kHz
MHz
ps
MHz
µs
Notes
Trimmed for 5V or 3.3V operation using
factory trim values. See Figure 3-1b on
page 15. SLIMO mode = 0.
Trimmed for 5V or 3.3V operation using
factory trim values. See Figure 3-1b on
page 15. SLIMO mode = 1.
24 MHz only for SLIMO mode = 0.
Refer to the AC Digital Block Specifica-
tions below.
Trimmed. Utilizing factory trim values.
a. 4.75V < Vdd < 5.25V.
b. Accuracy derived from Internal Main Oscillator with appropriate trim for Vdd range.
c. 3.0V < Vdd < 3.6V. See Application Note AN2012 “Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” for information on trimming for operation at 3.3V.
d. See the individual user module data sheets for information on maximum frequencies for user modules.
Table 3-15. 2.7V AC Chip-Level Specifications
Symbol
FIMO12
FIMO6
FCPU1
FBLK27
F32K1
Jitter32k
Jitter32k
TXRST
FMAX
TRAMP
Description
Internal Main Oscillator Frequency for 12 MHz
Internal Main Oscillator Frequency for 6 MHz
CPU Frequency (2.7V Nominal)
Digital PSoC Block Frequency (2.7V Nominal)
Internal Low Speed Oscillator Frequency
32 kHz RMS Period Jitter
32 kHz Peak-to-Peak Period Jitter
External Reset Pulse Width
Maximum frequency of signal on row input or row output.
Supply Ramp Time
Min
11.5
5.75
0.093
0
8
–
–
10
–
0
Typ
12⁰
6
3
12
32
150
1400
–
–
–
Max
Units
12.7^a,b,c MHz
6.35^a,b,c MHz
3.15^a,b MHz
12.5^a,b,c MHz
96
kHz
200
ns
–
–
µs
12.3
MHz
–
µs
Notes
Trimmed for 2.7V operation using factory
trim values. See Figure 3-1b on page 15.
SLIMO mode = 1.
Trimmed for 2.7V operation using factory
trim values. See Figure 3-1b on page 15.
SLIMO mode = 1.
24 MHz only for SLIMO mode = 0.
Refer to the AC Digital Block Specifica-
tions below.
a. 2.4V < Vdd < 3.0V.
b. Accuracy derived from Internal Main Oscillator with appropriate trim for Vdd range.
c. See Application Note AN2012 “Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” for information on maximum frequency for user modules.
April 20, 2005
Document No. 38-12025 Rev. *G
22