CY26112 Datasheet, PDF (2/6 Pages) Cypress Semiconductor – One-PLL General Purpose Clock Generator

CY26112
One-PLL General Purpose
Clock Generator
Features
• Integrated phase-locked loop
• Low skew, low jitter, high accuracy outputs
• Frequency Select Pin
• 3.3V Operation with 2.5 V Output Option
• 16-TSSOP
Benefits
Internal PLL with up to 333 MHz internal operation
Meets critical timing requirements in complex system designs
Dynamic frequency selection
Enables application compatibility
Industry standard package saves on board space
Part Number Outputs
CY26112
4
Input Frequency
14.7456 MHz
Output Frequency Range
2 x 3.6864 MHz, 2 x 33/66 MHz (selectable)
Logic Block Diagram
XIN
XOUT
OSC.
Q
Φ
VCO
P
PLL
FS
OE
OUTPUT
MULTIPLEXER
AND
DIVIDERS
3.6864
3.6864
33/66
33/66
Pin Configurations
CY26112
16-pin TSSOP
XIN ¹
VDD 2
AVDD 3
OE 4
AVSS 5
VSSL 6
NC ₇
LCLK1 8
16 ^XOUT
15 CLK4
14 CLK3
13 VSS
12 _N/C
11 VDDL
10 _FS
9 _LCLK2
Output
LCLK1
LCLK2
CLK3
CLK4
VDDL VSSL VDD AVDD AVSS VSS
Pin
Default Frequency
Unit
8
3.6864
MHz
9
3.6864
MHz
14
33/66 (selectable)
MHz
15
33/66 (selectable)
MHz
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07096 Rev. OBS
Revised December 02, 2004