CY8C20110_12 Datasheet, PDF (19/43 Pages) Cypress Semiconductor – CapSense® Express™ Button Capacitive Controllers

CY8C20110, CY8C20180
CY8C20160, CY8C20140
CY8C20142
Table 2. Recommended Layout Guidelines and Best Practices (continued)
S. No.
Category
Min
Max
Recommendations/Remarks
9
Trace routing
–
–
Traces should be routed on the non sensor side. If any non
CapSense trace crosses CapSense trace, ensure that
intersection is orthogonal.
10
Via position for the sensors
–
–
Via should be placed near the edge of the button/slider to
reduce trace length thereby increasing sensitivity.
11
Via hole size for sensor traces
–
–
10-mil
12
Number of vias on sensor trace
1
2
1
13
CapSense series resistor
placement
–
10 mm Place CapSense series resistors close to PSoC for noise
suppression. CapSense resistors have highest priority place
them first.
14
Distance between any CapSense 10-mil
20-mil 20-mil
trace to ground flood
15
Device placement
–
–
Mount the device on the layer opposite to sensor. The
CapSense trace length between the device and sensors should
be minimum
16
Placement of components in
–
2-layer PCB
–
Top layer – sensor pads and
bottom layer – PSoC, other components, and traces.
17
Placement of components in
–
4-layer PCB
–
Top layer – sensor pads,
second layer – CapSense traces,
third layer – hatched ground,
bottom layer – PSoC, other components, and non CapSense
traces
18
Overlay material
–
–
Should to be non conductive material. Glass, ABS plastic,
Formica
19
Overlay adhesives
–
–
Adhesive should be non conductive and dielectrically
homogenous. 467MP and 468MP adhesives made by 3M are
recommended.
20
LED back lighting
–
–
Cut a hole in the sensor pad and use rear mountable LEDs.
Refer the PCB layout below.
21
Board thickness
–
–
Standard board thickness for CapSense FR4 based designs is
1.6 mm.
The recommended maximum overlay thickness is 5 mm (with external CSInt)/ 2 mm (without external CSInt). For more details refer
to the section “The Integrating Capacitor (Cint)” in AN53490.
Note Some device packages does not have CSInt pin and external capacitor cannot be connected.
Document Number: 001-54606 Rev. *G
Page 19 of 43