CY8C29466_07 Datasheet, PDF (18/48 Pages) Cypress Semiconductor – PSoC® Mixed-Signal Array

CY8C29x66 Final Data Sheet
Register Map Bank 1 Table: Configuration Space
PRT0DM0
00 RW DBB20FN
40 RW ASC10CR0 80 RW RDI2RI
C0 RW
PRT0DM1
01 RW DBB20IN
41 RW ASC10CR1 81 RW RDI2SYN
C1 RW
PRT0IC0
02 RW DBB20OU 42 RW ASC10CR2 82 RW RDI2IS
C2 RW
PRT0IC1
03 RW
43
ASC10CR3 83 RW RDI2LT0
C3 RW
PRT1DM0
04 RW DBB21FN
44 RW ASD11CR0 84 RW RDI2LT1
C4 RW
PRT1DM1
05 RW DBB21IN
45 RW ASD11CR1 85 RW RDI2RO0
C5 RW
PRT1IC0
06 RW DBB21OU 46 RW ASD11CR2 86 RW RDI2RO1
C6 RW
PRT1IC1
07 RW
47
ASD11CR3 87 RW
C7
PRT2DM0
08 RW DCB22FN
48 RW ASC12CR0 88 RW RDI3RI
C8 RW
PRT2DM1
09 RW DCB22IN
49 RW ASC12CR1 89 RW RDI3SYN
C9 RW
PRT2IC0
0A RW DCB22OU 4A RW ASC12CR2 8A RW RDI3IS
CA RW
PRT2IC1
0B RW
4B
ASC12CR3 8B RW RDI3LT0
CB RW
PRT3DM0
0C RW DCB23FN
4C RW ASD13CR0 8C RW RDI3LT1
CC RW
PRT3DM1
0D RW DCB23IN
4D RW ASD13CR1 8D RW RDI3RO0
CD RW
PRT3IC0
0E RW DCB23OU 4E RW ASD13CR2 8E RW RDI3RO1
CE RW
PRT3IC1
0F RW
4F
ASD13CR3 8F RW
CF
PRT4DM0
10 RW DBB30FN
50 RW ASD20CR0 90 RW GDI_O_IN
D0 RW
PRT4DM1
11
RW DBB30IN
51 RW ASD20CR1 91 RW GDI_E_IN
D1 RW
PRT4IC0
12 RW DBB30OU 52 RW ASD20CR2 92 RW GDI_O_OU D2 RW
PRT4IC1
13 RW
53
ASD20CR3 93 RW GDI_E_OU D3 RW
PRT5DM0
14 RW DBB31FN
54 RW ASC21CR0 94 RW
D4
PRT5DM1
15 RW DBB31IN
55 RW ASC21CR1 95 RW
D5
PRT5IC0
16 RW DBB31OU 56 RW ASC21CR2 96 RW
D6
PRT5IC1
17 RW
57
ASC21CR3 97 RW
D7
PRT6DM0
18 RW DCB32FN
58 RW ASD22CR0 98 RW
D8
PRT6DM1
19 RW DCB32IN
59 RW ASD22CR1 99 RW
D9
PRT6IC0
1A RW DCB32OU 5A RW ASD22CR2 9A RW
DA
PRT6IC1
1B RW
5B
ASD22CR3 9B RW
DB
PRT7DM0
1C RW DCB33FN
5C RW ASC23CR0 9C RW
DC
PRT7DM1
1D RW DCB33IN
5D RW ASC23CR1 9D RW OSC_GO_EN DD RW
PRT7IC0
1E RW DCB33OU 5E RW ASC23CR2 9E RW OSC_CR4 DE RW
PRT7IC1
1F RW
5F
ASC23CR3 9F RW OSC_CR3 DF RW
DBB00FN
20 RW CLK_CR0
60 RW
A0
OSC_CR0 E0 RW
DBB00IN
21 RW CLK_CR1
61 RW
A1
OSC_CR1 E1 RW
DBB00OU
22 RW ABF_CR0
62 RW
A2
OSC_CR2 E2 RW
23
AMD_CR0 63 RW
A3
VLT_CR
E3 RW
DBB01FN
24 RW
64
A4
VLT_CMP
E4 R
DBB01IN
25 RW
65
A5
E5
DBB01OU
26 RW AMD_CR1
66 RW
A6
E6
27
ALT_CR0
67 RW
A7
DEC_CR2 E7 RW
DCB02FN
28 RW ALT_CR1
68 RW
A8
IMO_TR
E8 W
DCB02IN
29 RW CLK_CR2
69 RW
A9
ILO_TR
E9 W
DCB02OU 2A RW
6A
AA
BDG_TR
EA RW
2B
6B
AB
ECO_TR
EB W
DCB03FN
2C RW TMP_DR0
6C RW
AC
EC
DCB03IN
2D RW TMP_DR1 6D RW
AD
ED
DCB03OU 2E RW TMP_DR2 6E RW
AE
EE
2F
TMP_DR3 6F RW
AF
EF
DBB10FN
30 RW ACB00CR3 70 RW RDI0RI
B0 RW
F0
DBB10IN
31 RW ACB00CR0 71 RW RDI0SYN
B1 RW
F1
DBB10OU
32 RW ACB00CR1 72 RW RDI0IS
B2 RW
F2
33
ACB00CR2 73 RW RDI0LT0
B3 RW
F3
DBB11FN
34 RW ACB01CR3 74 RW RDI0LT1
B4 RW
F4
DBB11IN
35 RW ACB01CR0 75 RW RDI0RO0
B5 RW
F5
DBB11OU
36 RW ACB01CR1 76 RW RDI0RO1
B6 RW
F6
37
ACB01CR2 77 RW
B7
CPU_F
F7 RL
DCB12FN
38 RW ACB02CR3 78 RW RDI1RI
B8 RW
F8
DCB12IN
39 RW ACB02CR0 79 RW RDI1SYN
B9 RW
F9
DCB12OU 3A RW ACB02CR1 7A RW RDI1IS
BA RW FLS_PR1
FA RW
3B
ACB02CR2 7B RW RDI1LT0
BB RW
FB
DCB13FN
3C RW ACB03CR3 7C RW RDI1LT1
BC RW
FC
DCB13IN
3D RW ACB03CR0 7D RW RDI1RO0
BD RW
FD
DCB13OU 3E RW ACB03CR1 7E RW RDI1RO1
BE RW CPU_SCR1 FE #
3F
ACB03CR2 7F RW
BF
CPU_SCR0 FF #
Blank fields are Reserved and should not be accessed.
# Access is bit specific.
February 15, 2007
Document No. 38-12013 Rev. *H
2. Register Reference
18
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