CY8C21323_06 Datasheet, PDF (18/24 Pages) Cypress Semiconductor – PSoC® Mixed-Signal Array

CY8C21323 Automotive Preliminary Data Sheet
3. Electrical Specifications
3.4.3 AC Amplifier Specifications
The following table list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ T_A ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only.
Settling times, slew rates, and gain bandwidth are based on the Analog Continuous Time PSoC block.
Table 3-11. AC Amplifier Specifications
Symbol
Description
Min
T_COMP1
Comparator Mode Response Time, 50 mVpp Signal Cen-
tered on Ref
Typ
Max
Units
150
ns
Notes
3.4.4 AC Digital Block Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ T_A ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only.
Table 3-12. AC Digital Block Specifications
Function
All
Functions
Timer
Description
Maximum Block Clocking Frequency (> 4.75V)
Capture Pulse Width
Maximum Frequency, No Capture
Maximum Frequency, With or Without Capture
Counter
Enable Pulse Width
Maximum Frequency, No Enable Input
Maximum Frequency, Enable Input
Dead Band Kill Pulse Width:
Asynchronous Restart Mode
Synchronous Restart Mode
Disable Mode
Maximum Frequency
CRCPRS Maximum Input Clock Frequency
(PRS Mode)
CRCPRS Maximum Input Clock Frequency
(CRC Mode)
SPIM
Maximum Input Clock Frequency
SPIS
Maximum Input Clock Frequency
Width of SS_ Negated Between Transmissions
Transmitter Maximum Input Clock Frequency
Receiver Maximum Input Clock Frequency
Min
50^a
–
–
50
–
–
20
50
50
–
–
–
–
–
50
–
–
Typ
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Max
24.96
–
24.96
24.96
–
24.96
24.96
–
–
–
24.96
24.96
24.96
4.1
2.05
–
8.2
24.96
Units
MHz
Notes
4.75V < Vdd < 5.25V.
ns
MHz
MHz
ns
MHz
MHz
4.75V < Vdd < 5.25V.
4.75V < Vdd < 5.25V.
ns
ns
ns
MHz
MHz
4.75V < Vdd < 5.25V.
4.75V < Vdd < 5.25V.
MHz
MHz
Maximum data rate at 4.1 MHz due to 2 x over clocking.
MHz
ns
MHz
Maximum data rate at 3.08 MHz due to 8 x over clocking.
MHz
Maximum data rate at 3.08 MHz due to 8 x over clocking.
a. 50 ns minimum input pulse width is based on the input synchronizers running at 12 MHz (84 ns nominal period).
January 16, 2006
Document No. 001-06161 Rev. **
18
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