CY8C201A0_12 Datasheet, PDF (17/38 Pages) Cypress Semiconductor – CapSense® Express™ Slider Capacitive Controllers

CY8C201A0
Table 2. Layout Guidelines and Best Practices
S. No.
Category
Min
1 Button shape
–
2 Button size
3 Button-button spacing
4 Button ground clearance
5 Slider segment pattern
Saw tooth pattern
6 Number of slider segments
7 Slider segment size
8 Slider segment spacing
9 Ground flood - top layer
10 Ground flood - bottom layer
11 Trace length from sensor to
PSoC buttons
12 Trace width
13 Trace routing
5 mm
Equal to
button
ground
clearance
0.5 mm
5
2 mm
0.5 mm
–
–
–
0.17 mm
–
14 Via position for the sensors
–
15 Via hole size for sensor traces
–
16 Number of vias on sensor trace
1
17 CapSense series resistor
–
placement
18 Distance between any CapSense
trace to ground flood
19 Device placement
10 mil
–
20 Placement of components in 2
–
layer PCB
21 Placement of components in 4
–
layer PCB
22 Overlay material
–
23 Overlay adhesives
–
25 LED back lighting
–
26 Board thickness
–
Max
–
15 mm
–
Recommendations/Remarks
Solid round pattern, round with LED hole, rectangle with round
corners
10 mm
8 mm [X]
2 mm Button ground clearance = overlay thicknesses
10
5 mm
2 mm
–
–
200 mm
Design can have one 5 segment slider or one 10 segment slider
2 mm
Slider segment spacing = overlay thickness
Hatched ground 7 mil trace and 45 mil grid (15% filling)
Hatched ground 7 mil trace and 70 mil grid (10% filling)
< 100 mm.
0.20 mm
–
–
–
2
10 mm
20 mil
0.17 mm (7 mil)
Traces should be routed on the non sensor side. If any non
CapSense trace crosses CapSense trace, ensure that
intersection is orthogonal.
Via should be placed near the edge of the button/slider to
reduce trace length thereby increasing sensitivity.
10 mil
1
Place CapSense series resistors close to the device for noise
suppression.CapSense resistors have highest priority place
them first.
20 mil
–
Mount the device on the layer opposite to sensor. The
CapSense trace length between the device and sensors should
be minimum.
–
Top layer sensor pads and bottom layer PSoC, other
components and traces.
–
Top layer – sensor pads,
second layer – CapSense traces,
third layer-hatched ground,
bottom layer – PSoC, other components and non CapSense
traces
–
Should be non-conductive material (glass, ABS plastic,
formica)
–
Adhesive should be non conductive and dielectrically
homogenous. 467 MP and 468 MP adhesives made by 3M are
recommended.
–
Cut a hole in the sensor pad and use rear mountable LEDs.
Refer to the PCB layout in the following diagrams.
–
Standard board thickness for CapSense FR4 based designs is
1.6 mm.
Document Number: 001-54607 Rev. *G
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