CY7C1470V25_13 Datasheet, PDF (17/39 Pages) Cypress Semiconductor – null72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM with NoBL™ Architecture

TAP Controller State Diagram
1 ^TEST-LOGIC
RESET
0
0 ^{RUN-TEST/ 1}
IDLE
SELECT
1
DR-SCAN
0
1
CAPTURE-DR
0
SHIFT-DR
0
1
1
EXIT1-DR
0
PAUSE-DR 0
1
0
EXIT2-DR
1
UPDATE-DR
10
CY7C1470V25
CY7C1472V25
CY7C1474V25
SELECT
1
IR-SCAN
0
1
CAPTURE-IR
0
SHIFT-IR
0
1
1
EXIT1-IR
0
PAUSE-IR
0
1
0
EXIT2-IR
1
UPDATE-IR
10
The 0/1 next to each state represents the value of TMS at the rising edge of TCK.
Document Number: 38-05290 Rev. *R
Page 17 of 39