CY7C1381D Datasheet, PDF (17/29 Pages) Cypress Semiconductor – 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

PRELIMINARY
165-Ball BGA Boundary Scan Order ^{[13, 15]}
CY7C1381D (256K x 36)
Bit#
Ball ID
Bit#
Ball ID
CY7C1381D
CY7C1383D
CY7C1381D (256Kx36)
Bit#
Ball ID
1
N6
37
A9
2
N7
38
B9
3
10N
39
C10
4
P11
40
A8
5
P8
41
B8
6
R8
42
A7
7
R9
43
B7
8
P9
44
B6
9
P10
45
A6
10
R10
46
B5
11
R11
47
A5
12
H11
48
A4
13
N11
49
B4
14
M11
50
B3
15
L11
51
A3
16
K11
52
A2
17
J11
53
B2
18
M10
54
C2
19
L10
55
B1
20
K10
56
A1
21
J10
57
C1
22
H9
58
D1
23
H10
59
E1
24
G11
60
F1
25
F11
61
G1
26
E11
62
D2
27
D11
63
E2
28
G10
64
F2
29
F10
65
G2
30
E10
66
H1
31
D10
67
H3
32
C11
68
J1
33
A11
69
K1
34
B11
70
L1
35
A10
71
M1
36
B10
72
J2
Note:
15. Bit# 89 is Pre-Set HIGH.
73
K2
74
L2
75
M2
76
N1
77
N2
78
P1
79
R1
80
R2
81
P3
82
R3
83
P2
84
R4
85
P4
86
N5
87
P6
88
R6
89
Internal
Document #: 38-05544 Rev. *A
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