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BCM4354XKUBGT Datasheet, PDF (169/192 Pages) Cypress Semiconductor – Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver | |||
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BCM4354 Data Sheet
SDIO Timing
Table 51: SDIO Bus Timinga Parameters (Default Mode)
Parameter
Symbol Minimum Typical
SDIO CLK (All values are referred to minimum VIH and maximum VILb)
Frequency â Data Transfer mode
fPP
0
â
Frequency â Identification mode
fOD
0
â
Clock low time
Clock high time
Clock rise time
Clock low time
tWL
10
â
tWH
10
â
tTLH
â
â
tTHL
â
â
Inputs: CMD, DAT (referenced to CLK)
Input setup time
Input hold time
tISU
5
â
tIH
5
â
Outputs: CMD, DAT (referenced to CLK)
Output delay time â Data Transfer mode
tODLY 0
â
Output delay time â Identification mode
tODLY 0
â
a. Timing is based on CL ï£ 40pF load on CMD and Data.
b. Min. (Vih) = 0.7 Ã VDDIO and max. (Vil) = 0.2 Ã VDDIO.
Maximum Unit
25
MHz
400
kHz
â
ns
â
ns
10
ns
10
ns
â
ns
â
ns
14
ns
50
ns
Broadcom®
October 15, 2014 ⢠4354-DS109-R
BROADCOM CONFIDENTIAL
Page 168
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