CYW20732A0 Datasheet, PDF (16/35 Pages) Cypress Semiconductor – Bluetooth Low-Energy (BLE)-compliant

CYW20732A0
Table 8. Pin Descriptions (Cont.)
Pin Number
15
Pin Name
SDA
16
SCL
LDO Regulator Power Supplies
2
LDOIN
3
LDOOUT
I/O
Power Domain
I/O, PU VDDM
I/O, PU VDDM
Description
Data signal for an external I²C device.
Alternative function:
■ SPI_1: MOSI (master only)
■ GPIO0
■ CTS
Clock signal for an external I²C device.
Alternative function:
■ SPI_1: SPI_CLK (master only)
■ GPIO1
■ RTS
I
N/A
O
N/A
Battery input supply for the LDO
LDO output
Table 9. GPIO Pin Descriptions^a
Pin Number Pin Name
19
P0
20
P1
21
P3
22
P2
Default Di-
rection
Input
Input
Input
Input
After POR Power Do-
State
main
Alternate Function Description
Input
floating
VDDO
■ GPIO: P0
■ A/D converter input
■ Peripheral UART: puart_tx
■ SPI_2: MOSI (master and slave)
■ IR_RX
■ 60Hz_main
Input
floating
VDDO
■ Not available during TMC=1
■ GPIO: P1
■ A/D converter input
■ Peripheral UART: puart_rts
■ SPI_2: MISO (master and slave)
Input
floating
VDDO
■ IR_TX
■ GPIO: P3
■ Peripheral UART: puart_cts
Input
floating
VDDO
■ SPI_2: SPI_CLK (master and slave)
■ GPIO: P2
■ Peripheral UART: puart_rx
■ SPI_2: SPI_CS (slave only)
■ SPI_2: SPI_MOSI (master only)
Document Number: 002-14837 Rev. *L
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