CY7C1360 Datasheet, PDF (15/34 Pages) Cypress Semiconductor – 9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Partial Truth Table for Read/Write^{[5, 9]}
Function (CY7C1360B)
GW
Read
H
Read
H
Write Byte A – (DQ_A and DQP_A)
H
Write Byte B – (DQ_B and DQP_B)
H
Write Bytes B, A
H
Write Byte C – (DQ_C and DQP_C)
H
Write Bytes C, A
H
Write Bytes C, B
H
Write Bytes C, B, A
H
Write Byte D – (DQ_D and DQP_D)
H
Write Bytes D, A
H
Write Bytes D, B
H
Write Bytes D, B, A
H
Write Bytes D, C
H
Write Bytes D, C, A
H
Write Bytes D, C, B
H
Write All Bytes
H
Write All Bytes
L
Truth Table for Read/Write^[5]
Function (CY7C1362B)
Read
Read
Write Byte A – (DQ_A and DQP_A)
Write Byte B – (DQ_B and DQP_B)
Write Bytes B, A
Write All Bytes
Write All Bytes
CY7C1360B
CY7C1362B
BWE
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
BW_D
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
X
BW_C
X
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
X
BW_B
X
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
X
BW_A
X
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
X
GW
BWE
BW_B
BW_A
H
H
X
X
H
L
H
H
H
L
H
L
H
L
L
H
H
L
L
L
H
L
L
L
L
X
X
X
Document #: 38-05291 Rev. *C
Page 15 of 34