CYNSE10512 Datasheet, PDF (141/153 Pages) Cypress Semiconductor – Ayama™ 10000 Network Search Engine

CONFIDENTIAL
PRELIMINARY
CYNSE10512
CYNSE10256
CYNSE10128
Table 10-3. JTAG Timing Parameters
Parameter
Description
f_JTAG
t_TCYC
t_IH
t_TL
t_TMSS
t_TMSH
t_TDIS
t_TDIH
t_TDOV
t_TDOX
Maximum JTAG TAP Controller Frequency
TCK Clock Cycle Time
TCK Clock HIGH Time
TCK Clock LOW Time
TMS Set-up to TCK Clock Rise
TMS Hold After TCK Clock Rise
TDI Set-up to TCK Clock Rise
TDI Hold After TCK Clock Rise
TCK Clock LOW to TDO Valid
TCK Clock LOW to TDO Invalid
Ayama 10000-
083
Min. Max.
10
100
40
40
10
10
10
10
10
10
Ayama 10000-
100
Min. Max.
10
100
40
40
10
10
10
10
10
10
Ayama 10000-
133
Min. Max.
10
100
40
40
10
10
10
10
10
10
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Document #: 38-02069 Rev. *F
Page 141 of 153
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