CYRF69103 Datasheet, PDF (13/73 Pages) Cypress Semiconductor – Programmable Radio on Chip Low Power

CYRF69103
Examples
ADD [7],
5
MOV REG[8], 6
;In this case, value in the
;memory location at address 7 is
;added to the immediate value of
;5, and the result is placed in
;the memory location at address 7.
;In this case, the immediate
;value of 6 is moved into the
;register space location at
;address 8.
Destination Indexed Source Immediate
The result of an instruction using this addressing mode is
placed within either the RAM memory space or the register
space. Operand 1 is added to the X register to form the
address of the result. The source for the instruction is Operand
2, which is an immediate value. Arithmetic instructions require
two sources; the second source is the location specified by
Operand 1 added with the X register. Instructions using this
addressing mode are three bytes in length.
Table 15.Destination Indexed Source Immediate
Opcode
Instruction
Operand 1
Destination Index
Operand 2
Immediate Value
Examples
ADD [X+7],
5
MOV REG[X+8], 6
;In this case, the value in
;the memory location at
;address X+7 is added with
;the immediate value of 5
;and the result is placed in
;the memory location at
;address X+7.
;In this case, the
;immediate value of 6 is
;moved into the location in
;the register space at
;address X+8.
Destination Direct Source Direct
The result of an instruction using this addressing mode is
placed within the RAM memory. Operand 1 is the address of
the result. Operand 2 is an address that points to a location in
the RAM memory that is the source for the instruction. This
addressing mode is only valid on the MOV instruction. The
instruction using this addressing mode is three bytes in length.
Table 16.Destination Direct Source Direct
Opcode
Operand 1
Operand 2
Instruction Destination Address Source Address
Example
MOV [7], [8] ;In this case, the value in the
;memory location at address 8 is
;moved to the memory location at
;address 7.
Source Indirect Post Increment
The result of an instruction using this addressing mode is
placed in the Accumulator. Operand 1 is an address pointing
to a location within the memory space, which contains an
address (the indirect address) for the source of the instruction.
The indirect address is incremented as part of the instruction
execution. This addressing mode is only valid on the MVI
instruction. The instruction using this addressing mode is two
bytes in length. Refer to the PSoC Designer: Assembly
Language User Guide for further details on MVI instruction.
Table 17.Source Indirect Post Increment
Opcode
Instruction
Operand 1
Source Address Address
Example
MVI A,
[8] ;In this case, the value in the
;memory location at address 8 is
;an indirect address. The memory
;location pointed to by the
;indirect address is moved into the
;Accumulator. The indirect
;address is then incremented.
Destination Indirect Post Increment
The result of an instruction using this addressing mode is
placed within the memory space. Operand 1 is an address
pointing to a location within the memory space, which contains
an address (the indirect address) for the destination of the
instruction. The indirect address is incremented as part of the
instruction execution. The source for the instruction is the
Accumulator. This addressing mode is only valid on the MVI
instruction. The instruction using this addressing mode is two
bytes in length.
Table 18.Destination Indirect Post Increment
Opcode
Operand 1
Instruction
Destination Address Address
Example
MVI [8], A
;In this case, the value in
;the memory location at
;address 8 is an indirect
;address. The Accumulator is
;moved into the memory location
;pointed to by the indirect
;address. The indirect address
;is then incremented.
Document #: 001-07611 Rev *B
Page 13 of 73
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