CY2545 Datasheet, PDF (13/17 Pages) Cypress Semiconductor – Quad PLL Programmable Spread Spectrum Clock Generator with Serial I2C Interface

PRELIMINARY
CY2545
CY2547
AC Electrical Specifications
Parameter
Description
Conditions
Min Typ Max Unit
F_IN (crystal) Crystal frequency, XIN
8
F_IN (clock) Input clock frequency (CLKIN or EXCLKIN)
8
F_CLK
Output clock frequency
3
DC
Output duty cycle, all clocks except Ref Out Duty Cycle is defined in Figure 9 on page 45
14; t₁/t₂, 50% of V_DD
DC
Ref out duty cycle
Ref In Min 45%, Max 55%
40
T_RF1[1]
T_RF2[1]
T_RF3[1]
T_RF4[1]
T_CCJ1[1,2]
Output rise/fall time
Output rise/fall time
Output rise/fall time
Output rise/fall time
Cycle-to-cycle jitter max (Pk-Pk)
Output clocks, measured from 20% to –
80% of V_DD__CLK CL = 15 pF, Drive [0,0]
Output clocks, measured from 20% to –
80% of V_DD__CLK CL = 15 pF, Drive [0,1]
Output clocks, measured from 20% to –
80% of V_DD__CLK CL = 15 pF, Drive [1,0]
Output clocks, measured from 20% to –
80% of V_DD__CLK CL = 15 pF, Drive [1,1]
Configuration dependent. See Table 4 –
T₁₀
PLL Lock time
Measured from 90% of the applied
–
power supply level
– 48 MHz
– 166 MHz
– 166 MHz
50 55 %
– 60 %
6.8 – ns
3.4 – ns
2.0 – ns
1.0 – ns
– – ps
1 3 ms
Table 4. Configuration Example for C-C Jitter
Ref. Freq.
(MHz)
14.3181
CLK1 Output
Freq. C-C Jitter
(MHz) Typ (ps)
8.0
134
CLK2 Output
Freq. C-C Jitter
(MHz) Typ (ps)
166
103
19.2
74.25
99
27
48
67
48
48
93
166
94
27
109
27
123
CLK3 Output
Freq. C-C Jitter
(MHz) Typ (ps)
48
92
8
91
166
103
166
137
CLK4 Output
Freq. C-C Jitter
(MHz) Typ (ps)
74.25
81
27
110
74.25
97
166
138
CLK5 Output
Freq. C-C Jitter
(MHz) Typ (ps)
Not Used
48
75
Not Used
8
103
Recommended Crystal Specification for SMD Package
Parameter
Description
Fmin
Minimum frequency
Fmax
Maximum frequency
R1(max)
Maximum motional resistance (ESR)
C0(max)
Maximum shunt capacitance
CL(max)
Maximum parallel load capacitance
DL(max)
Maximum crystal drive level
Range 1 Range 2 Range 3
8
14
28
14
28
48
135
50
30
4
4
2
18
14
12
300
300
300
Unit
MHz
MHz
Ω
pF
pF
µW
Recommended Crystal Specification for Thru-Hole Package
Parameter
Description
Fmin
Minimum frequency
Fmax
Maximum frequency
R1(max)
Maximum motional resistance (ESR)
C0(max)
Maximum shunt capacitance
CL(max)
Maximum parallel load capacitance
Notes
1. Guaranteed by design but not 100% tested.
2. Configuration dependent.
Range 1 Range 2 Range 3
8
14
24
14
24
32
90
50
30
7
7
7
18
12
12
Unit
MHz
MHz
Ω
pF
pF
Document #: 001-13196 Rev. **
Page 13 of 17
[+] Feedback