MB9B460R Datasheet, PDF (121/166 Pages) Cypress Semiconductor – 32-Bit ARM® Cortex® - MF FM4 Microcontroller

MB9B460R Series
High-speed synchronous serial (SPI = 0, SCINV = 1)
Parameter
Symbol
Pin
name
Conditions
V_CC < 4.5V
Min
Max
(V_CC = 2.7V to 5.5V, V_SS = 0V)
V_CC ≥ 4.5V
Min
Max
Unit
Serial clock cycle time
t_SCYC
SCKx
4t_CYCP
-
4t_CYCP
-
ns
SCK↑→SOT delay time
SIN→SCK↓
setup time
SCK↓→SIN hold time
Serial clock "L" pulse width
Serial clock "H" pulse width
SCK↑→SOT delay time
SIN→SCK↓
setup time
SCK↓→SIN hold time
SCK falling time
SCK rising time
t_SHOVI
t_IVSLI
t_SLIXI
t_SLSH
t_SHSL
t_SHOVE
t_IVSLE
t_SLIXE
tF
tR
SCKx,
-10
SOTx
Internal shift
+10
-10
+10
ns
SCKx,
clock operation ₁₄
SINx
-
12.5
-
ns
12.5*
SCKx,
SINx
5
-
5
-
ns
SCKx
2t_CYCP –
5
-
2t_CYCP –
5
-
ns
SCKx
t_CYCP +
10
-
t_CYCP +
10
-
ns
SCKx,
SOTx
SCKx,
SINx
-
External shift
clock operation
5
15
-
-
5
15
ns
-
ns
SCKx,
SINx
SCKx
SCKx
5
-
5
-
ns
-
5
-
5
ns
-
5
-
5
ns
Notes:
• The above characteristics apply to CLK synchronous mode.
• tCYCP indicates the APB bus clock cycle time.
About the APB bus number which UART is connected to, see "Block Diagram" in this datasheet.
• These characteristics only guarantee the following pins.
• No chip select
: SIN4_1, SOT4_1, SCK4_1
• Chip select
: SIN6_1, SOT6_1, SCK6_1, SCS6_1
• When the external load capacitance CL = 30pF. (For *, when CL = 10pF)
Document Number: 002-04868 Rev.*A
Page 121 of 166