CY7C1471V25 Datasheet, PDF (12/30 Pages) Cypress Semiconductor – 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture

PRELIMINARY
CY7C1471V25
CY7C1473V25
CY7C1475V25
Truth Table for Read/Write^{[2, 3, 9]}
Function (CY7C1473V25)
Read
Write – No Bytes Written
Write Byte a – (DQ_a and DQP_a)
Write Byte b – (DQ_b and DQP_b)
Write Both Bytes
Truth Table for Read/Write^{[2, 3, 9]}
Function (CY7C1475V25)
Read
Write – No Bytes Written
Write Byte X − (DQ_x and DQP_x)
Write All Bytes
WE
BW_b
H
X
L
H
L
H
L
L
L
L
WE
H
L
L
L
BW_a
X
H
L
H
L
BW_x
X
H
L
All BW = L
Document #: 38-05287 Rev. *E
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