CYNSE70064A Datasheet, PDF (114/127 Pages) Cypress Semiconductor – Search Engine

CYNSE70064A
CLK2X
PHS_L
CMDV
CMD[1:0]
CMD[8:2]
DQ
OE_L
z
WE_L ^z
CE_L ^z
ALE_L z
SADR[21:0] ^z
cycle cycle cycle cycle cycle cycle cycle cycle cycle cycle
1 2 3 4 5 6 7 8 9 10
Write
01
AB
Address
xx
z
z
0
z
0
z
0
Address
z
ACK
z
SSV
z
SSF
z
TLSZ = 10, HLAT = XXX, LRAM = 0, LDEV = 0
Figure 12-13. SRAM Write Through Device Number 0 in Bank of 31 Devices (Device 0 Timing)
Document #: 38-02041 Rev. *E
Page 114 of 127