English
Language : 

FM24V02A Datasheet, PDF (11/19 Pages) Cypress Semiconductor – 256-Kbit (32K × 8) Serial (I2C) F-RAM
FM24V02A
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. These user guidelines are not tested.
Storage temperature ................................ –55 C to +125 C
Maximum accumulated storage time
At 125 °C ambient temperature ................................. 1000 h
At 85 °C ambient temperature ................................ 10 Years
Ambient temperature
with power applied ................................... –55 °C to +125 °C
Supply voltage on VDD relative to VSS .........–1.0 V to +4.5 V
Input voltage* ......... –1.0 V to + 4.5 V and VIN < VDD + 1.0 V
DC voltage applied to outputs
in HI-Z state ........................................ –0.5 V to VDD + 0.5 V
Transient voltage (< 20 ns) on
any pin to ground potential ................. –2.0 V to VDD + 2.0 V
DC Electrical Characteristics
Package power dissipation
capability (TA = 25 °C) ................................................. 1.0 W
Surface mount lead soldering
temperature (3 seconds) ......................................... +260 C
Electrostatic discharge voltage
Human Body Model (JEDEC Std JESD22-A114-B) .............. 2 kV
Charged Device Model (JEDEC Std JESD22-C101-A) ........ 500 V
Latch-up current .................................................... > 140 mA
* Exception: The “VIN < VDD + 1.0 V” restriction does not apply
to the SCL and SDA inputs.
Operating Range
Range Ambient Temperature (TA)
VDD
Industrial
–40 C to +85 C
2.0 V to 3.6 V
Over the Operating Range
Parameter
Description
VDD
Power supply
IDD
Average VDD current
ISB
VDD standby current
IZZ
Sleep mode current
ILI
Input leakage current
(Except WP and A2-A0)
Input leakage current
(for WP and A2-A0)
ILO
Output leakage current
VIH
Input HIGH voltage (SDL, SDA)
Test Conditions
SCL toggling
fSCL = 100 kHz
between
VDD – 0.2 V and VSS,
other inputs VSS or
fSCL = 1 MHz
fSCL = 3.4 MHz
VDD – 0.2 V.
SCL = SDA = VDD. All other inputs VSS or
VDD. Stop command issued.
SCL = SDA = VDD. All other inputs VSS or
VDD. Stop command issued.
VSS < VIN < VDD
VSS < VOUT < VDD
Min
2.0
–
–
–
–
–
–1
–1
–1
0.7 × VDD
Typ [2]
3.3
–
–
–
90
5
–
–
–
–
VIL
VOL[3]
Rin[4]
Vhys[5]
Input HIGH voltage (WP, A2-A0)
Input LOW voltage
0.7 × VDD
–
– 0.3
–
Output LOW voltage
IOL = 3 mA
–
–
IOL = 6 mA
–
–
Input resistance (WP, A2-A0) For VIN = VIL(Max)
50
–
For VIN = VIH(Min)
1
–
Hysteresis of Schmitt Trigger
inputs
fSCL = 100 kHz, 0.05 × VDD –
400 kHz, 1 MHz
fSCL = 3.4 MHz 0.06 × VDD –
Notes
2.
3.
Typical values are at 25 °C, VDD =
The FM24V02A does not meet the
VNDXDP(tyI2pC).
Not 100% tested.
specification in the
Fast-mode
Plus
(Fm+,
1
MHz)
for
IOL
of
20
mA
at
a
VOL
of
0.4
V.
4.
5.
The
The
input pull-down circuit is strong (50 k)
FM24V02A does not meet the NXP I2C
when the input
specification in
voltage is below
the High Speed
VIL and weak (1 M) when the input voltage is above
Mode (Hs-mode, 3.4 MHz) for Vhys of 0.1 × VDD.
VIH.
Max
3.6
175
400
1000
150
8
+1
+100
+1
VDD(max) +
0.3
VDD + 0.3
0.3 × VDD
0.4
0.6
–
–
–
–
Unit
V
A
A
A
A
A
A
A
A
V
V
V
V
V
k
M
V
V
Document Number: 001-90839 Rev. *G
Page 11 of 19