CY8C21123 Datasheet, PDF (11/33 Pages) Cypress Semiconductor – PSoC™ Mixed-Signal Array

2. Register Reference
This chapter lists the registers of the CY8C21x23 PSoC device. For detailed register information, reference the
PSoC™ Mixed-Signal Array Technical Reference Manual.
2.1 Register Conventions
The register conventions specific to this section are listed in the
following table.
Convention
R
W
L
C
#
Description
Read register or bit(s)
Write register or bit(s)
Logical register or bit(s)
Clearable register or bit(s)
Access is bit specific
2.2 Register Mapping Tables
The PSoC device has a total register address space of 512
bytes. The register space is referred to as IO space and is
divided into two banks. The XOI bit in the Flag register (CPU_F)
determines which bank the user is currently in. When the XOI
bit is set the user is in Bank 1.
Note In the following register mapping tables, blank fields are
Reserved and should not be accessed.
February 25, 2005
Document No. 38-12022 Rev. *G
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