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CY7C4255V_02 Datasheet, PDF (11/20 Pages) Cypress Semiconductor – 32K/64Kx18 Low Voltage Deep Sync FIFOs
CY7C4255V/CY7C4265V
CY7C4275V/CY7C4285V
Switching Waveforms (continued)
Programmable Almost Empty Flag Timing (applies only in SMODE (SMODE is LOW))
tCLKH
tCLKL
WCLK
WEN
tENS tENH
PAE
RCLK
REN
tSKEW3 [22]
Note 21
tPAE synch
N + 1 WORDS
IN FIFO
tENS
tENS tENH
Note 23 tPAE synch
Programmable Almost Full Flag Timing
4275V–16
WCLK
WEN
tCLKH
Note 24
tCLKL
tENS tENH
[25]
PAF
RCLK
REN
tPAF
FULL– M WORDS
IN FIFO[26]
FULL– (M+1) WORDS
IN FIFO [27]
tPAF
tENS
4275V–17
Notes:
21. PAE offset − n.
22. tSKEW3 is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of WCLK and the
rising RCLK is less than tSKEW3, then PAE may not change state until the next RCLK.
23. If a read is performed on this rising edge of the read clock, there will be Empty + (n−1) words in the FIFO when PAE goes LOW.
24. PAF offset = m. Number of data words written into FIFO already = 8192 − (m + 1) for the CY7C4255V, 16384 − (m + 1) for the CY7C4265V, 32768 − (m +
1) for the CY7C4275V, and 65536 − (m + 1) for the CY7C4285V.
25. PAF is offset = m.
26. 8192 − m words in CY7C4255V, 16384 − m words in CY7C4265V, 32768 − m words in CY7C4275V, and 65536 − m words in CY7C4285V.
27. 8192 − (m + 1) words in CY7C4255V, 16384 − (m + 1) words in CY7C4265V, 32768 − (m + 1) words in CY7C4275V, and 65536 − (m + 1) words in CY7C4285V.
Document #: 38-06012 Rev. *A
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