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CY28RS480 Datasheet, PDF (11/15 Pages) Cypress Semiconductor – Clock Generator for ATI RS480 Chipset
AC Electrical Specifications (continued)
Parameter
Description
PCI
TDC
PCI Duty Cycle
TPERIOD
Spread Disabled PCI Period
TPERIODSS Spread Enabled PCI Period, SSC
TPERIODAbs Spread Disabled PCI Period
TPERIODSSAbs Spread Enabled PCI Period, SSC
THIGH
PCI high time
TLOW
PCI low time
TR / TF
PCI rise and fall times
TCCJ
PCI Cycle to Cycle Jitter
USB
TDC
Duty Cycle
TPERIOD
Period
TPERIODAbs Absolute Period
THIGH
USB high time
TLOW
USB low time
TR / TF
Rise and Fall Times
TCCJ
Cycle to Cycle Jitter
TLTJ
Long Term Jitter
REF
TDC
REF Duty Cycle
TPERIOD
REF Period
TPERIODAbs REF Absolute Period
TR / TF
REF Rise and Fall Times
TCCJ
REF Cycle to Cycle Jitter
ENABLE/DISABLE and SET-UP
TSTABLE
Clock Stabilization from Power-up
TSS
Stopclock Set-up Time
TSH
Stopclock Hold Time
Condition
Measurement at 1.5V
Measurement at 1.5V
Measurement at 1.5V
Measurement at 1.5V
Measurement at 1.5V
Measurement at 2.4V
Measurement at 0.4V
Measured between 0.8V and 2.0V
Measurement at 1.5V
Measurement at 1.5V
Measurement at 1.5V
Measurement at 1.5V
Measurement at 2.4V
Measurement at 0.4V
Measured between 0.8V and 2.0V
Measurement at 1.5V
Measurement at 1.5V@1 us
Measurement at 1.5V
Measurement at 1.5V
Measurement at 1.5V
Measured between 0.8V and 2.0V
Measurement at 1.5V
CY28RS480
Min.
Max. Unit
45
29.99100
29.9910
29.49100
29.49100
12.0
12.0
1.0
–
55
%
30.00900 ns
30.15980 ns
30.50900 ns
30.65980 ns
–
ns
–
ns
4.0 V/ns
500
ps
45
55
%
20.83125 20.83542 ns
20.48125 21.18542 ns
8.094 10.036 ns
7.694
9.836 ns
1.0
2.0 V/ns
–
350
ps
–
TBD ps
45
69.8203
68.82033
1.0
–
55
69.8622
70.86224
4.0
1000
%
ns
ns
V/ns
ps
–
1.8 ms
10.0
–
ns
0
–
ns
Document #: 38-07638 Rev. *C
Page 11 of 15