CY14B256KA Datasheet, PDF(11/26 Page) Cypress Semiconductor – 256 Kbit (32K x 8) nvSRAM with Real Time Clock

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

CY14B256KA Datasheet, PDF (11/26 Pages) Cypress Semiconductor – 256 Kbit (32K x 8) nvSRAM with Real Time Clock

◁

CY14B256KA

Flags Register

The Flag register has three flag bits: WDF, AF, and PF, which can

be used to generate an interrupt. These flags are set by the

watchdog timeout, alarm match, or power fail monitor respec-

tively. The processor can either poll this register or enable inter-

rupts to be informed when a flag is set. These flags are automat-

ically reset when the register is read. The flags register is

automatically loaded with the value 0x00 on power up (except for

the OSCF bit; see Stopping and Starting the Oscillator on page

9).

Figure 4. RTC Recommended Component Configuration

Recommended Values

Y1 = 32.768 KHz (12.5 pF)

C1 = 10 pF

C2 = 67 pF

Note: The recommended values for C1 and C2 include

board trace capacitance.

Watchdog

Timer

Power

Monitor

VINT

Clock

Alarm

WDF

WIE

PFE

AIE

Xout

Xin

Figure 5. Interrupt Block Diagram

P/L

VCC

Driver

H/L

VSS

WDF - Watchdog Timer Flag

WIE - Watchdog Interrupt

Enable

PF - Power Fail Flag

PFE - Power Fail Enable

INT

AF - Alarm Flag

AIE - Alarm Interrupt Enable

P/L - Pulse Level

H/L - High/Low

Document #: 001-55720 Rev. *A

Page 11 of 26

[+] Feedback

▷