W210H Datasheet, PDF (10/14 Pages) Cypress Semiconductor – Spread Spectrum FTG for VIA K7 Chipset

W210
DC Electrical Characteristics: T_A = 0°C to +70°C, V_DDQ3 = 3.3V±5% (continued)
Parameter
Description
Test Condition
Min.
Crystal Oscillator
V_TH
X1 Input Threshold Voltage^[4]
C_LOAD
Load Capacitance, Imposed on
External Crystal^[5]
C_IN,X1
X1 Input Capacitance^[6]
Pin Capacitance/Inductance
V_DDQ3 = 3.3V
Pin X2 unconnected
C_IN
C_OUT
L_IN
Input Pin Capacitance
Output Pin Capacitance
Input Pin Inductance
Except X1 and X2
Typ.
Max.
1.65
14
28
5
6
7
Unit
V
pF
pF
pF
pF
nH
AC Electrical Characteristics
T_A = 0°C to +70°C, V_DDQ3 = 3.3V±5%
AC clock parameters are tested and guaranteed over stated operating conditions using the stated lump capacitive load at the
clock output; Spread Spectrum is disabled.
CPU Clock Outputs (CPUT0, CPUC0, CPUT_CS)^[7]
Parameter
Description
Test Condition/Comments
t_R
Output Rise Edge Rate
t_F
Output Fall Edge Rate
t_D
Duty Cycle
Measured at 50% point
t_JC
Jitter, Cycle to Cycle
f_ST
Frequency Stabilization Assumes full supply voltage reached
from Power-up (cold within 1 ms from power-up. Short
start)
cycles exist prior to frequency
stabilization.
Z_o
AC Output Impedance V_O = V_X
CPU = 100 MHz
Min. Typ. Max.
1.0
1.0
50
250
3
50
CPU = 133 MHz
Min. Typ. Max. Unit
1.0
V/ns
1.0
V/ns
50
%
250
ps
3 ms
50
Ω
Notes:
4. X1 input threshold voltage (typical) is V_DD/2.
5. The W210 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is 14 pF;
this includes typical stray capacitance of short PCB traces to crystal.
6. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
7. Refer to Figure 5 for K7 operation clock driver test circuit.
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