W164 Datasheet, PDF (10/11 Pages) Cypress Semiconductor – Spread Spectrum Desktop/Notebook System Frequency Generator

W164
48-MHz and 24-MHz Clock Output (Lump Capacitance Test Load = 20 pF)
Parameter
Description
f
Frequency, Actual
Test Condition/Comments
Determined by PLL divider ratio (see m/n below)
f_D
Deviation from 48 MHz
(48.008 – 48)/48
m/n
PLL Ratio
(14.31818 MHz x 57/17 = 48.008 MHz)
t_R
Output Rise Edge Rate Measured from 0.4V to 2.4V
t_F
Output Fall Edge Rate
Measured from 2.4V to 0.4V
t_D
Duty Cycle
Measured on rising and falling edge at 1.5V
f_ST
Frequency Stabilization Assumes full supply voltage reached within 1 ms
from Power-up (cold start) from power-up. Short cycles exist prior to fre-
quency stabilization.
Z_o
AC Output Impedance
Average value during switching transition. Used
for determining series termination value.
CPU = 66.8/100 MHz
Min. Typ. Max. Unit
48.008
24.004
MHz
+167
ppm
57/17, 57/34
0.5
2 V/ns
0.5
2 V/ns
45
55 %
3
ms
25
Ω
Ordering Information
Ordering Code
Package
Name
W164
G
Package Type
28-pin SOIC (300 mils)
Document #: 38-00841
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