CY62137FV30_1106 Datasheet, PDF (10/16 Pages) Cypress Semiconductor – 2-Mbit (128 K x 16) Static RAM Automatic power down when deselected

CY62137FV30 MoBL^®
Switching Waveforms (continued)
Figure 9. Write Cycle 3: WE Controlled, OE LOW ^[28]
ADDRESS
CE
BHE/BLE
WE
DATA I/O
ADDRESS
CE
BHE/BLE
WE
DATA I/O
t_WC
t_SCE
t_BW
t_AW
t_HA
t_SA
t_PWE
NOTE 29
t_HZWE
t_SD
DATA_IN
t_HD
t_LZWE
Figure 10. Write Cycle 4: BHE/BLE Controlled, OE LOW ^[28]
t_WC
t_SA
NOTE 29
t_HZWE
t_SCE
t_AW
t_BW
t_PWE
t_SD
DATA_IN
t_HA
t_HD
t_LZWE
Notes
28. If CE goes HIGH simultaneously with WE = V_IH, the output remains in a high impedance state.
29. During this period, the I/Os are in output state. Do not apply input signals.
Document Number: 001-07141 Rev. *J
Page 10 of 16
[+] Feedback