Z9952 Datasheet, PDF (1/9 Pages) Cypress Semiconductor – 3.3V, 180MHz, Multi-Output Zero Delay Buffer

Z9952
3.3V, 180MHz, Multi-Output Zero Delay Buffer
Product Features
• 180MHz Clock Support
• 150ps Maximum Output to Output Skew
• Supports PowerPC^TM, Intel and RISC Processors
• 11 Clock Outputs: Frequency Configurable
• Outputs Drive up to 22 Clock Lines
• LVCMOS/LVTTL Compatible Inputs
• Output Tri-state Control
• Spread Spectrum Compatible
• 3.3V Power Supply
• Pin Compatible with MPC952
• Industrial Temp. Range: -40°C to +85°C
• 32-Pin TQFP Package
Block Diagram
PLL_EN#
REFCLK
FB_IN
Phase
Detector
VCO
200-480M
LPF
VCO_SEL
SELA
SELB
/4,
/2
/6
/4,
/2
QA0
QA1
QA2
QA3
QA4
QB0
QB1
QB2
QB3
SELC
MR/OE#
Figure 1
/2,
QC0
/4
QC1
Frequency Table
VCO_SEL SEL (A:C)
0
000
0
001
0
010
0
011
0
100
0
101
0
110
0
111
1
000
1
001
1
010
1
011
1
100
1
101
1
110
1
111
QA(0:4)
VCO/4
VCO/4
VCO/4
VCO/4
VCO/6
VCO/6
VCO/6
VCO/6
VCO/8
VCO/8
VCO/8
VCO/8
VCO/12
VCO/12
VCO/12
VCO/12
Table 1
QB(0:3)
VCO/4
VCO/4
VCO/2
VCO/2
VCO/4
VCO/4
VCO/2
VCO/2
VCO/8
VCO/8
VCO/4
VCO/4
VCO/8
VCO/8
VCO/4
VCO/4
QC (0,1)
VCO/2
VCO/4
VCO/2
VCO/4
VCO/2
VCO/4
VCO/2
VCO/4
VCO/4
VCO/8
VCO/4
VCO/8
VCO/4
VCO/8
VCO/4
VCO/8
Pin Configuration
VCO_SEL 1
SELC 2
SELB 3
SELA 4
MR/OE# 5
REFCLK 6
VSS 7
FB_IN 8
Z9952
24 VSS
23 QB1
22 QB0
21 VDDC
20 VDDC
19 QA4
18 QA3
17 VSS
Cypress Semiconductor Corporation
http://www.cypress.com
Document#: 38-07085 Rev. *B
12/22/2002
Page 1 of 9